forked from github/verilator
7 lines
256 B
Systemverilog
7 lines
256 B
Systemverilog
// DESCRIPTION: Verilog::Preproc: Example source code
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2000-2007 by Wilson Snyder.
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At file `__FILE__ line `__LINE__
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`define INCFILE <t_preproc_inc3.vh>
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`include `INCFILE
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