forked from github/verilator
542e324869
Associative arrays that specify a wildcard index type may be indexed by integral expressions of any size, with leading zeros removed automatically. A natural representation for such expressions is a string, especially that the standard explicitly specifies automatic casts from string indices to bit vectors of equivalent size. The automatic cast part is done implicitly by the existing type system. A simpler way to just make this work would be to convert wildcard index type to a string type directly in the parser code, but several new AST classes are needed to make sure illegal method calls are detected. The verilated data structure implementation is reused, because there is no need for differentiating the behavior on C++ side.
46 lines
1.1 KiB
Systemverilog
46 lines
1.1 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
|
|
//
|
|
// This file ONLY is placed under the Creative Commons Public Domain, for
|
|
// any use, without warranty, 2019 by Wilson Snyder.
|
|
// SPDX-License-Identifier: CC0-1.0
|
|
|
|
typedef class Cls;
|
|
|
|
class Cls;
|
|
integer imembera;
|
|
integer imemberb;
|
|
endclass : Cls
|
|
|
|
module t (/*AUTOARG*/);
|
|
|
|
initial begin
|
|
string a [*];
|
|
string k;
|
|
string v;
|
|
|
|
Cls x;
|
|
|
|
v = a.num("badarg");
|
|
v = a.size("badarg");
|
|
v = a.exists(); // Bad
|
|
v = a.exists(k, "bad2");
|
|
a.delete(k, "bad2");
|
|
|
|
a.sort; // Not legal on assoc
|
|
a.rsort; // Not legal on assoc
|
|
a.reverse; // Not legal on assoc
|
|
a.shuffle; // Not legal on assoc
|
|
|
|
a.first; // Not legal on wildcard
|
|
a.last; // Not legal on wildcard
|
|
a.next; // Not legal on wildcard
|
|
a.prev; // Not legal on wildcard
|
|
a.unique_index; // Not legal on wildcard
|
|
a.find_index; // Not legal on wildcard
|
|
a.find_first_index; // Not legal on wildcard
|
|
a.find_last_index; // Not legal on wildcard
|
|
|
|
a[x] = "bad";
|
|
end
|
|
endmodule
|