verilator/test_regress/t/t_var_port2_bad.out
2019-07-14 21:42:03 -04:00

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%Error: t/t_var_port2_bad.v:6: Input/output/inout declaration not found for port: 'portwithoin'
module t (portwithoin);
^~~~~~~~~~~
%Error: t/t_var_port2_bad.v:7: Input/output/inout does not appear in port list: 'portwithin'
input portwithin;
^~~~~~~~~~
%Error: Exiting due to