verilator/test_regress/t/t_lint_rsvd_bad.out
2019-07-14 21:42:03 -04:00

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%Error: t/t_lint_rsvd_bad.v:6: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
config cfgBad;
^~~~~~
%Error: t/t_lint_rsvd_bad.v:6: syntax error, unexpected IDENTIFIER
config cfgBad;
^~~~~~
%Error: t/t_lint_rsvd_bad.v:7: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
endconfig
^~~~~~~~~
%Error: Exiting due to