forked from github/verilator
113 lines
2.0 KiB
Plaintext
113 lines
2.0 KiB
Plaintext
$version Generated by VerilatedVcd $end
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$date Thu Oct 24 09:44:07 2019
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$end
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$timescale 1ns $end
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$scope module top $end
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$var wire 1 ) clk $end
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$scope module t $end
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$var wire 1 ) clk $end
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$var wire 32 # cyc [31:0] $end
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$var wire 1 % toggle $end
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$scope module suba $end
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$var wire 1 ) clk $end
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$var wire 32 $ cyc [31:0] $end
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$var wire 32 & cyc_eq_5_vlCoverageUserTrace [31:0] $end
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$var wire 1 % toggle $end
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$upscope $end
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$scope module subb $end
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$var wire 1 ) clk $end
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$var wire 32 $ cyc [31:0] $end
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$var wire 32 ' cyc_eq_5_vlCoverageUserTrace [31:0] $end
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$var wire 1 % toggle $end
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$upscope $end
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$scope module subc $end
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$var wire 1 ) clk $end
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$var wire 32 $ cyc [31:0] $end
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$var wire 32 ( cyc_eq_5_vlCoverageUserTrace [31:0] $end
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$var wire 1 % toggle $end
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$upscope $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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