Geza Lore 0722f47539 Improve V3MergeCond by reordering statements (#3125) ... V3MergeCond merges consecutive conditional `_ = cond ? _ : _` and `if (cond) ...` statements. This patch adds an analysis and ordering phase that moves statements with identical conditions closer to each other, in order to enable more merging opportunities. This in turn eliminates a lot of repeated conditionals which reduced dynamic branch count and branch misprediction rate. Observed 6.5% improvement on multi-threaded large designs, at the cost of less than 2% increase in Verilation speed.		2022-05-27 16:57:51 +01:00
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t	Improve V3MergeCond by reordering statements (#3125)	2022-05-27 16:57:51 +01:00
.gdbinit
.gitignore
CMakeLists.txt
driver.pl	Add assert when VerilatedContext is mis-deleted (#3121).	2022-05-15 10:51:03 -04:00
input.vc
input.xsim.vc
Makefile
Makefile_obj	Implement 'forceable' attribute	2022-01-16 15:31:37 +00:00