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Mario1159
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verilator
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df107628c6
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2 Commits
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Wilson Snyder
df107628c6
Fix default clocking syntax; covers go outside the block
2008-08-06 17:51:36 -04:00
Wilson Snyder
500dc2170f
Support SystemVerilog "cover property" statements.
2008-08-06 12:52:39 -04:00