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0722f47539
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Author SHA1 Message Date
Geza Lore
0722f47539
Improve V3MergeCond by reordering statements (#3125) 
V3MergeCond merges consecutive conditional `_ = cond ? _ : _` and
`if (cond) ...` statements. This patch adds an analysis and ordering
phase that moves statements with identical conditions closer to each
other, in order to enable more merging opportunities. This in turn
eliminates a lot of repeated conditionals which reduced dynamic branch
count and branch misprediction rate. Observed 6.5% improvement on
multi-threaded large designs, at the cost of less than 2% increase in
Verilation speed.
 2022-05-27 16:57:51 +01:00
github action
a372e010bd Apply 'make format' 2022-05-25 04:51:51 +00:00
Wilson Snyder
530817191e Support non-ANSI interface port declarations (#3439). 2022-05-25 00:50:50 -04:00
Geza Lore
1282548a1c Only consider definitions in t_flag_csplit 2022-05-20 18:02:00 +01:00
Geza Lore
c7610ed044 Fix FST tracing thread in CMake build 2022-05-20 17:04:46 +01:00
Geza Lore
ffc1c51526 Commentary 2022-05-20 16:44:53 +01:00
Geza Lore
b130a8cfeb Add -DVM_TRACE_VCD in model builds with Make with --trace 2022-05-20 16:44:38 +01:00
Geza Lore
551bd284dd Rename some internals related to multi-threaded tracing 
Rename the implementation internals of current multi-threaded tracing to
be "offload mode". No functional change, nor user interface change
intended.
 2022-05-20 16:44:35 +01:00
Krzysztof Bieganski
9edccfdffa
Initial support for intra-assignment timing controls, net delays (#3427) 
This is a pre-PR to #3363.

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2022-05-17 19:19:44 +01:00
Geza Lore
1a056f6db9 Fix invalid conditional merging when starting at 'c = c ? a : b' 
Fixes #3409.
 2022-05-17 18:36:40 +01:00
Krzysztof Bieganski
e018eb7bac
Support AstClass::repairCache() after V3Class (#3431) 
This is a pre-PR to #3363.

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2022-05-17 09:22:43 -04:00
Krzysztof Bieganski
0a91ddf38a
Tests: Better grep check in t_foreach (#3435) 
This is a pre-PR to #3363.

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2022-05-17 09:20:59 -04:00
Krzysztof Bieganski
67bb2c640e
Tests: Rename t_timing_clkgen to t_timing_clkgen1 (#3430) 
This is a pre-PR to #3363, which will introduce more clock gen tests.

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2022-05-17 09:19:51 -04:00
Krzysztof Bieganski
561eaa311d
Tests: Enable CI testing with GCC 10 (#3432) 
This is a pre-PR to #3363.

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2022-05-17 09:19:06 -04:00
Krzysztof Bieganski
3f7a248ed4
Refactor some of the Begin handling to a separate function (#3426) 
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2022-05-16 20:45:33 +01:00
Krzysztof Bieganski
ecaa07a72a
Rename AstTimingControl to AstEventControl (#3425) 
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
 2022-05-16 20:44:41 +01:00
Wilson Snyder
99bdc27be3 Internals: Cleanup some statics, trivial part towards (#3419) 2022-05-15 14:26:55 -04:00
Wilson Snyder
c3c46967dc Tests: Appease sanitizer (#3121). 2022-05-15 11:50:52 -04:00
Wilson Snyder
7f1a9239ab Commentary, fix typo (#3121) 2022-05-15 11:14:07 -04:00
Geza Lore
c8102c8ffe Fix typo 2022-05-15 16:01:35 +01:00
Wilson Snyder
5aa12e9b51 Add assert when VerilatedContext is mis-deleted (#3121). 2022-05-15 10:51:03 -04:00
Geza Lore
829437b20b Commentary - dependencies 2022-05-15 15:25:46 +01:00
Wilson Snyder
3c4131d45d Fix 'with' operator with type casting (#3387). 2022-05-15 09:53:48 -04:00
Wilson Snyder
ae8d8ee1ac Fix crash with misuse of display. 2022-05-15 09:29:45 -04:00
Geza Lore
89ec3d16dc Allow const nodes in VNRef 
No functional change.
 2022-05-15 13:30:07 +01:00
Wilson Snyder
7602c983c5 Commentary 2022-05-14 18:16:31 -04:00
HungMingWu
560efb2c9e
Internals: Fix memory leak in V3FileLine (#3407) (#3408). No functional change intended. 2022-05-14 18:15:38 -04:00
Wilson Snyder
c2328ef46a Spelling fixes. 2022-05-14 16:12:57 -04:00
Wilson Snyder
f6035447ae Internals: Use mutable for mutexes. No functional change. 2022-05-13 07:21:39 -04:00
Wilson Snyder
38438b3373 Internals: Cleanup some defaults. No functional change. 2022-05-12 23:30:39 -04:00
Wilson Snyder
71dedccbbe Support compile time trace signal selection with tracing_on/off (#3323). 2022-05-12 22:28:08 -04:00
Martin Stadler
cddbe4642f
Fix cmake rules to support higher-level targest (#3377) (#3386). 
Don't add linker flags as generator expression to support linking `TARGET` to higher-level targets in a top-level CMakeLists.txt file.
 2022-05-11 21:33:05 -04:00
Wilson Snyder
bdfdc737a0 Internals: Cleanup V3Config. No functional change intended. 2022-05-11 00:47:52 -04:00
Wilson Snyder
3d045c3aee Internals: Cleanup some verilog.y formatting. No functional change. 2022-05-09 00:37:51 -04:00
HungMingWu
9583f152ee
Fix compile error when enable VL_LEAK_CHECKS (#3411). 
Signed-off-by: HungMingWu <u9089000@gmail.com>
 2022-05-08 20:49:13 -04:00
Wilson Snyder
5b2755d28d Untabify verilog.y (#3412). No functional change. 2022-05-08 20:46:18 -04:00
Kamil Rakoczy
9378259779
Fix UNOPTFLAT warning from initial static var (#3406) 
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
 2022-05-06 10:24:03 +02:00
Wilson Snyder
3d762282b9 Fix hang with large case statement optimization (#3405). 2022-05-05 07:02:52 -04:00
Wilson Snyder
30783e6a79 devel release 2022-05-02 22:23:05 -04:00
Wilson Snyder
aa86c777f4 Version bump 2022-05-02 22:17:20 -04:00
Geza Lore
a2792785fe Add V3GraphVertex::dotRank to add GraphViz ranks to graph dumps 
This is a simple debugging aid to allow constraining the graph layout
via GraphViz rank directives. Note this is not related in any way to the
vertex 'rank' attribute used by some of the graph algorithms.

No functional change.
 2022-05-02 10:27:26 +01:00
Wilson Snyder
267315e7d4 Commentary: Update ChangeLog 2022-05-01 22:01:30 -04:00
Wilson Snyder
99d39cb6ff Fix autoconf warning 2022-05-01 10:43:04 -04:00
Wilson Snyder
915ceb2d04 Tests: Untabify tests. No functional change. 2022-05-01 10:10:00 -04:00
Geza Lore
49c90ecbce Issue consistent INITIALDLY/COMBDLY/BLKSEQ warnings 
Some cases of warnings about the use of blocking and non-blocking
assignments in combinational vs sequential processes were suppressed in
a way that is inconsistent with the *actual* current execution model of
Verilator. Turning these back on to, well, warn the user that these might
cause unexpected results. V5 will clean these up, but until then err on
the side of caution.

Fixes #864.
 2022-04-29 17:05:44 +01:00
Geza Lore
8395004d25 Add AstNode::exists and AstNode::forall predicates 2022-04-29 15:44:22 +01:00
Kamil Rakoczy
5de1c619c8
Fix foreach segmentation fault (#3400). 2022-04-28 06:11:31 -04:00
Yoda Lee
a6d678d41d
Fix hang in generate symbol references (#3391) (#3398) 2022-04-27 18:40:36 -04:00
Aliaksei Chapyzhenka
2b91d764b5
Added missing #include <memory> (#3392) 
Fixes #3390
 2022-04-23 20:11:46 +01:00
Geza Lore
62337bb6ac Future proofing some tests. No functional change. 2022-04-23 15:12:52 +01:00