forked from github/verilator
Tests: Unsupported test for bug1627.
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
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test_regress/t/t_unpacked_concat_bad.out
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test_regress/t/t_unpacked_concat_bad.out
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%Warning-WIDTHCONCAT: t/t_typedef_logic_in_concat_bad.v:12: Unsized numbers/parameters not allowed in replications.
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: ... In instance t
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typedef logic [15:0] count_t;
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^~~~~
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... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message.
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%Error: Exiting due to 1 warning(s)
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# This warning message is pretty misleading. Instead of pointing out to the call to $bits() without a cast, it points to the type declaration of the argument to bits. It would be more useful if it looked like this:
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%Warning-WIDTHCONCAT: t/t_typedef_logic_in_concat_bad.v:15: Unsized numbers/parameters not allowed in replications.
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: ... In instance t
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localparam bit_int_t [1:0] count_bits = {2{$bits(count_t)}};
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^~~~~
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... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message.
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%Error: Exiting due to 1 warning(s)
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test_regress/t/t_unpacked_concat_bad.pl
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test_regress/t/t_unpacked_concat_bad.pl
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2019 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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scenarios(linter => 1);
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$Self->{vlt_all} and unsupported("Verilator unsupported, bug1627");
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lint(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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test_regress/t/t_unpacked_concat_bad.v
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test_regress/t/t_unpacked_concat_bad.v
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2019 by Driss Hafdi
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module t (/*AUTOARG*/
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// Inputs
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clk
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);
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input clk;
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typedef logic [15:0] count_t;
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typedef bit [31:0] bit_int_t;
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localparam bit_int_t [1:0] count_bits = {2{$bits(count_t)}};
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initial begin
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$write("%d\n", count_bits[0]);
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$write("%d\n", count_bits[1]);
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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