Fix concats with wide width, bug1088 continued.

This commit is contained in:
Wilson Snyder 2016-09-16 18:54:28 -04:00
parent 7ca1d35a4e
commit 999f278971
3 changed files with 51 additions and 1 deletions

View File

@ -144,8 +144,12 @@ private:
&& nodep->firstAbovep()->castNodeAssign()
&& assignNoTemp(nodep->firstAbovep()->castNodeAssign())) {
// Not much point if it's just a direct assignment to a constant
} else if (nodep->backp()->castSel()
&& nodep->backp()->castSel()->widthp() == nodep) {
// AstSel::width must remain a constant
} else if (nodep->firstAbovep()
&& nodep->firstAbovep()->castArraySel()) { // ArraySel's are pointer refs, ignore
&& nodep->firstAbovep()->castArraySel()) {
// ArraySel's are pointer refs, ignore
} else {
UINFO(4,"Cre Temp: "<<nodep<<endl);
createDeepTemp(nodep, false);

18
test_regress/t/t_param_seg.pl Executable file
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@ -0,0 +1,18 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
compile (
);
execute (
check_finished=>1,
);
ok(1);
1;

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@ -0,0 +1,28 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2016 by Mandy Xu.
// verilator lint_off WIDTH
//bug1088
module t (/*AUTOARG*/
// Outputs
err_count,
// Inputs
clk, syndromes
);
input clk;
input [7:0] syndromes;
output reg [1:0] err_count = 0;
localparam [95:0] M = 96'h4;
wire [3:0] syn1 = syndromes[0+:M];
always @(posedge clk) begin
err_count <= {1'b0, |syn1};
$write("*-* All Finished *-*\n");
$finish;
end
endmodule