forked from github/verilator
Parse 'matches', still unsupported.
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@ -545,7 +545,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
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"local" { FL; return yLOCAL__LEX; }
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"logic" { FL; return yLOGIC; }
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"longint" { FL; return yLONGINT; }
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"matches" { ERROR_RSVD_WORD("SystemVerilog 2005"); }
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"matches" { FL; return yMATCHES; }
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"modport" { FL; return yMODPORT; }
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"new" { FL; return yNEW__LEX; }
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"null" { FL; return yNULL; }
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@ -656,7 +656,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
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%token<fl> yLOCAL__LEX "local-in-lex"
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%token<fl> yLOGIC "logic"
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%token<fl> yLONGINT "longint"
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//UNSUP %token<fl> yMATCHES "matches"
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%token<fl> yMATCHES "matches"
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%token<fl> yMODPORT "modport"
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%token<fl> yMODULE "module"
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%token<fl> yNAND "nand"
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@ -1056,11 +1056,11 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
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//UNSUP %token<fl> prREDUCTION
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//UNSUP %token<fl> prNEGATION
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//UNSUP %token<fl> prEVENTBEGIN
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//UNSUP %token<fl> prTAGGED
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%token<fl> prTAGGED
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// These prevent other conflicts
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%left yP_ANDANDAND
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//UNSUP %left yMATCHES
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%left yMATCHES
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//UNSUP %left prTAGGED
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//UNSUP %left prSEQ_CLOCKING
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@ -3482,7 +3482,9 @@ statement_item<nodep>: // IEEE: statement_item
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if ($1 == uniq_UNIQUE) $2->uniquePragma(true);
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if ($1 == uniq_UNIQUE0) $2->unique0Pragma(true);
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if ($1 == uniq_PRIORITY) $2->priorityPragma(true); }
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//UNSUP caseStart caseAttrE yMATCHES case_patternListE yENDCASE { }
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// &&& is part of expr so case_patternListE aliases to case_itemListE
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| unique_priorityE caseStart caseAttrE yMATCHES case_patternListE yENDCASE
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{ $$ = nullptr; BBUNSUP($4, "Unsupported: matches (for tagged union)"); }
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| unique_priorityE caseStart caseAttrE yINSIDE case_insideListE yENDCASE
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{ $$ = $2; if ($5) $2->addItemsp($5);
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if (!$2->caseSimple()) $2->v3error("Illegal to have inside on a casex/casez");
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@ -3750,10 +3752,9 @@ caseAttrE:
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| caseAttrE yVL_PARALLEL_CASE { GRAMMARP->m_caseAttrp->parallelPragma(true); }
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;
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//UNSUPcase_patternListE<caseItemp>: // IEEE: case_pattern_item
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//UNSUP // &&& is part of expr so aliases to case_itemList
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//UNSUP case_itemListE { $$ = $1; }
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//UNSUP ;
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case_patternListE<caseItemp>: // IEEE: case_pattern_item
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case_itemListE { $$ = $1; }
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;
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case_itemListE<caseItemp>: // IEEE: [ { case_item } ]
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/* empty */ { $$ = nullptr; }
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@ -4859,8 +4860,10 @@ expr<nodeExprp>: // IEEE: part of expression/constant_expression/
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// // IEEE: cond_pattern - here to avoid reduce problems
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// // "expr yMATCHES pattern"
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// // IEEE: pattern - expanded here to avoid conflicts
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//UNSUP ~l~expr yMATCHES patternNoExpr { UNSUP }
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//UNSUP ~l~expr yMATCHES ~r~expr { UNSUP }
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| ~l~expr yMATCHES patternNoExpr { $$ = new AstConst{$2, AstConst::BitFalse{}};
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BBUNSUP($<fl>2, "Unsupported: matches operator"); }
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| ~l~expr yMATCHES ~r~expr { $$ = new AstConst{$2, AstConst::BitFalse{}};
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BBUNSUP($<fl>2, "Unsupported: matches operator"); }
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//
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// // IEEE: expression_or_dist - here to avoid reduce problems
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// // "expr yDIST '{' dist_list '}'"
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@ -8,61 +8,49 @@
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%Error-UNSUPPORTED: t/t_tagged.v:18:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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18 | u = tagged m_invalid;
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:21:16: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches'
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21 | case (u) matches
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:22:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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22 | tagged m_invalid: ;
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:23:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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23 | tagged m_int: $stop;
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:26:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches'
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26 | if (u matches tagged m_invalid) ;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:21:16: Unsupported: matches (for tagged union)
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21 | case (u) matches
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:26:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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26 | if (u matches tagged m_invalid) ;
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| ^~~~~~
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%Error: t/t_tagged.v:26:28: syntax error, unexpected IDENTIFIER
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%Error-UNSUPPORTED: t/t_tagged.v:26:13: Unsupported: matches operator
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26 | if (u matches tagged m_invalid) ;
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| ^~~~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:27:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches'
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27 | if (u matches tagged m_int .n) $stop;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:27:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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27 | if (u matches tagged m_int .n) $stop;
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| ^~~~~~
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%Error: t/t_tagged.v:27:28: syntax error, unexpected IDENTIFIER
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%Error-UNSUPPORTED: t/t_tagged.v:27:13: Unsupported: matches operator
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27 | if (u matches tagged m_int .n) $stop;
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| ^~~~~
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:29:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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29 | u = tagged m_int (123);
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:32:16: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches'
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32 | case (u) matches
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:33:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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33 | tagged m_invalid: $stop;
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:34:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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34 | tagged m_int .n: if (n !== 123) $stop;
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| ^~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:37:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches'
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37 | if (u matches tagged m_invalid) $stop;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:32:16: Unsupported: matches (for tagged union)
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32 | case (u) matches
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:37:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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37 | if (u matches tagged m_invalid) $stop;
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| ^~~~~~
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%Error: t/t_tagged.v:37:28: syntax error, unexpected IDENTIFIER
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%Error-UNSUPPORTED: t/t_tagged.v:37:13: Unsupported: matches operator
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37 | if (u matches tagged m_invalid) $stop;
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| ^~~~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:38:13: Unsupported: SystemVerilog 2005 reserved word not implemented: 'matches'
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38 | if (u matches tagged m_int .n) if (n != 123) $stop;
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| ^~~~~~~
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%Error-UNSUPPORTED: t/t_tagged.v:38:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
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38 | if (u matches tagged m_int .n) if (n != 123) $stop;
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| ^~~~~~
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%Error: t/t_tagged.v:38:28: syntax error, unexpected IDENTIFIER
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%Error-UNSUPPORTED: t/t_tagged.v:38:13: Unsupported: matches operator
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38 | if (u matches tagged m_int .n) if (n != 123) $stop;
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| ^~~~~
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| ^~~~~~~
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%Error: Exiting due to
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