forked from github/verilator
Fix bad-syntax crasses, bug1591.
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Changes
2
Changes
@ -27,7 +27,7 @@ The contributors that suggested a given feature are shown in []. Thanks!
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**** Fix multithreaded yield behavior when no work. [Patrick Stewart]
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**** Fix bad-syntax crashes, bug1548, bug1550-1553, bug1557-1560, bug1563,
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bug1573-1577, bug1582-1585. [Eric Rippey]
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bug1573-1577, bug1582-1585, bug1591. [Eric Rippey]
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**** Fix false CMPCONST/UNSIGNED warnings on "inside", bug1581. [Mitch Hayenga]
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@ -396,7 +396,7 @@ private:
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clearOptimizable(nodep, "Var write & read");
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}
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vscp->user1( vscp->user1() | VU_RV);
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bool isConst = nodep->varp()->isParam();
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bool isConst = nodep->varp()->isParam() && nodep->varp()->valuep();
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AstConst* constp = isConst ? fetchConstNull(nodep->varp()->valuep()) : NULL;
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if (isConst && constp) { // Propagate PARAM constants for constant function analysis
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if (!m_checkOnly && optimizable()) {
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@ -952,6 +952,7 @@ private:
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AstAttrOf* oldAttr = m_attrp;
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m_attrp = nodep;
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userIterateAndNext(nodep->fromp(), WidthVP(SELF, BOTH).p());
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if (nodep->dimp()) userIterateAndNext(nodep->dimp(), WidthVP(SELF, BOTH).p());
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// Don't iterate children, don't want to lose VarRef.
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switch (nodep->attrType()) {
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case AstAttrType::VAR_BASE:
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@ -981,9 +982,13 @@ private:
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"Unsized expression");
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std::pair<uint32_t,uint32_t> dim
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= nodep->fromp()->dtypep()->skipRefp()->dimensions(true);
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uint32_t msbdim = dim.first+dim.second;
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if (!nodep->dimp() || VN_IS(nodep->dimp(), Const) || msbdim<1) {
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int dim = !nodep->dimp() ? 1 : VN_CAST(nodep->dimp(), Const)->toSInt();
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uint32_t msbdim = dim.first + dim.second;
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if (!nodep->dimp() || msbdim < 1) {
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int dim = 1;
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AstConst* newp = dimensionValue(nodep->fromp()->dtypep(), nodep->attrType(), dim);
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nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep);
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} else if (VN_IS(nodep->dimp(), Const)) {
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int dim = VN_CAST(nodep->dimp(), Const)->toSInt();
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AstConst* newp = dimensionValue(nodep->fromp()->dtypep(), nodep->attrType(), dim);
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nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep);
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}
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29
test_regress/t/t_param_noval_bad.out
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29
test_regress/t/t_param_noval_bad.out
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@ -0,0 +1,29 @@
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%Error: t/t_param_noval_bad.v:6: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'P'
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: ... In instance t
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module t #(parameter P);
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^
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%Warning-WIDTH: t/t_param_noval_bad.v:9: Logical Operator GENFOR expects 1 bit on the For Test Condition, but For Test Condition's VARREF 'P' generates 32 bits.
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: ... In instance t
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for (j=0; P; j++)
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^~~
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... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
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%Error: t/t_param_noval_bad.v:9: Non-genvar used in generate for: 'j'
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: ... In instance t
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for (j=0; P; j++)
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^~~
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%Error: t/t_param_noval_bad.v:9: Loop unrolling failed.
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: ... In instance t
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for (j=0; P; j++)
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^~~
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%Error: t/t_param_noval_bad.v:9: Unsupported: Can't unroll generate for; Unable to unroll loop
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: ... In instance t
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for (j=0; P; j++)
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^~~
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%Error: t/t_param_noval_bad.v:9: For loop doesn't have genvar index, or is malformed
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: ... In instance t
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for (j=0; P; j++)
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^~~
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%Error: Internal Error: t/t_param_noval_bad.v:9: ../V3Param.cpp:505: GENFOR should have been wrapped in BEGIN
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: ... In instance t
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for (j=0; P; j++)
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^~~
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18
test_regress/t/t_param_noval_bad.pl
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18
test_regress/t/t_param_noval_bad.pl
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@ -0,0 +1,18 @@
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2008 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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scenarios(linter => 1);
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lint(
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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12
test_regress/t/t_param_noval_bad.v
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12
test_regress/t/t_param_noval_bad.v
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@ -0,0 +1,12 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2019 by Wilson Snyder.
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module t #(parameter P);
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generate
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var j;
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for (j=0; P; j++)
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initial begin end
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endgenerate
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endmodule
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