Fix shift with XOR mis-optimization, bug776.

This commit is contained in:
Wilson Snyder 2014-05-26 18:16:52 -04:00
parent f705f9b275
commit 5f8f474c0c
3 changed files with 8 additions and 2 deletions

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@ -9,7 +9,7 @@ indicates the contributor was also the author of the fix; Thanks!
*** Support SV 2012 package import before port list.
**** Fix shift corner issues, bug765, bug766, bug768, bug772. [Clifford Wolf]
**** Fix shift corner-cases, bug765, bug766, bug768, bug772, bug776. [Clifford Wolf]
**** Fix C compiler interpreting signing, bug773. [Clifford Wolf]

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@ -2070,7 +2070,7 @@ private:
TREEOP ("AstAnd {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstOr {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstXor {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstXnor{operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
// "AstXnor{operandShiftSame(nodep)}", // Cannot ShiftSame as the shifted-in zeros might create a one
// Note can't simplify a extend{extends}, extends{extend}, as the sign bits end up in the wrong places
TREEOPV("AstExtend {$lhsp.castExtend}", "replaceExtend(nodep, nodep->lhsp()->castExtend()->lhsp())");
TREEOPV("AstExtendS{$lhsp.castExtendS}", "replaceExtend(nodep, nodep->lhsp()->castExtendS()->lhsp())");

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@ -20,6 +20,7 @@
reg [2:0] w3_u;
reg [3:0] w4_u;
reg [4:0] w5_u;
reg [5:0] w6_u;
reg [15:0] w16a_u;
reg [15:0] w16_u;
real r;
@ -147,6 +148,11 @@
w5_s = w5_u >> ((w5_u ? 1 : 2) << w5_u);
`checkh(w5_s, 5'b0);
//bug776
w4_u = `c(4, 1);
w4_u = (w4_u >> w4_u) ^~ (w4_u >> w4_u);
`checkh(w4_u, 4'b1111);
if (fail) $stop;
$write("*-* All Finished *-*\n");
$finish;