forked from github/verilator
Fix LSB error on --hierarchical submodules (#3539).
This commit is contained in:
Wilson Snyder
parent
b6c116d4bf
commit
2723223884
1
Changes
1
Changes
@ -38,6 +38,7 @@ Verilator 5.001 devel
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* Add error on real edge event control.
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* Fix linker errors in user-facing timing functions (#3657). [Krzysztof Bieganski, Antmicro Ltd]
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* Fix null access on optimized-out fork statements (#3658). [Krzysztof Bieganski, Antmicro Ltd]
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* Fix LSB error on --hierarchical submodules (#3539). [danbone]
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Verilator 4.228 2022-10-01
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@ -597,7 +597,9 @@ class EmitVBaseVisitor VL_NOT_FINAL : public EmitCBaseVisitor {
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} else if (nodep->isRanged()) {
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puts(" [");
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puts(cvtToStr(nodep->hi()));
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puts(":0] ");
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puts(":");
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puts(cvtToStr(nodep->lo()));
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puts("] ");
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}
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}
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void visit(AstConstDType* nodep) override {
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@ -115,7 +115,7 @@ endmodule
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module sub1(
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input wire clk,
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input wire [7:0] in,
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input wire [11:4] in, // Uses higher LSB to cover bug3539
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output wire [7:0] out); `HIER_BLOCK
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logic [7:0] ff;
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@ -131,7 +131,7 @@ module sub2(
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logic [7:0] ff;
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// dpi_import_func returns (dpi_eport_func(v) -1)
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// dpi_import_func returns (dpi_eport_func(v) -1)
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import "DPI-C" context function int dpi_import_func(int v);
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export "DPI-C" function dpi_export_func;
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@ -1,5 +1,5 @@
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$date
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Tue Feb 22 23:52:17 2022
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Tue Oct 18 17:13:03 2022
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$end
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$version
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@ -41,7 +41,7 @@ $upscope $end
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$upscope $end
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$scope module i_sub1 $end
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$var wire 1 ! clk $end
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$var wire 8 " in [7:0] $end
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$var wire 8 " in [11:4] $end
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$var wire 8 # out [7:0] $end
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$upscope $end
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$scope module i_sub2 $end
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@ -128,11 +128,11 @@ $upscope $end
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$upscope $end
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$scope module top.t.i_sub1 $end
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$var wire 1 > clk $end
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$var wire 8 ? in [7:0] $end
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$var wire 8 ? in [11:4] $end
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$var wire 8 @ out [7:0] $end
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$scope module sub1 $end
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$var wire 1 > clk $end
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$var wire 8 ? in [7:0] $end
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$var wire 8 ? in [11:4] $end
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$var wire 8 @ out [7:0] $end
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$var logic 8 A ff [7:0] $end
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$upscope $end
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@ -1,57 +1,57 @@
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$version Generated by VerilatedVcd $end
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$date Sun Dec 19 12:27:52 2021 $end
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$date Tue Oct 18 17:12:31 2022 $end
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$timescale 1ps $end
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$scope module top $end
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$scope module t $end
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$var wire 1 # clk $end
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$var wire 1 * clk $end
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$var wire 32 + count [31:0] $end
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$var wire 8 $ out0 [7:0] $end
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$var wire 8 % out1 [7:0] $end
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$var wire 8 & out2 [7:0] $end
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$var wire 8 ' out3 [7:0] $end
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$var wire 8 * out3_2 [7:0] $end
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$var wire 8 # out0 [7:0] $end
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$var wire 8 $ out1 [7:0] $end
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$var wire 8 % out2 [7:0] $end
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$var wire 8 & out3 [7:0] $end
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$var wire 8 ' out3_2 [7:0] $end
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$var wire 8 ( out5 [7:0] $end
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$var wire 8 ) out6 [7:0] $end
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$scope module i_delay0 $end
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$var wire 1 # clk $end
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$var wire 8 ' in [7:0] $end
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$var wire 1 * clk $end
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$var wire 8 & in [7:0] $end
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$var wire 8 ( out [7:0] $end
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$upscope $end
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$scope module i_delay1 $end
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$var wire 1 # clk $end
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$var wire 1 * clk $end
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$var wire 8 ( in [7:0] $end
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$var wire 8 ) out [7:0] $end
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$upscope $end
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$scope module i_sub0 $end
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$var wire 1 # clk $end
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$var wire 8 ' in [7:0] $end
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$var wire 8 $ out [7:0] $end
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$var wire 1 * clk $end
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$var wire 8 & in [7:0] $end
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$var wire 8 # out [7:0] $end
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$scope module i_sub0 $end
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$var wire 1 # clk $end
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$var wire 8 ' in [7:0] $end
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$var wire 8 $ out [7:0] $end
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$var wire 1 * clk $end
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$var wire 8 & in [7:0] $end
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$var wire 8 # out [7:0] $end
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$upscope $end
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$upscope $end
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$scope module i_sub1 $end
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$var wire 1 # clk $end
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$var wire 1 * clk $end
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$var wire 8 # in [11:4] $end
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$var wire 8 $ out [7:0] $end
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$upscope $end
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$scope module i_sub2 $end
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$var wire 1 * clk $end
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$var wire 8 $ in [7:0] $end
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$var wire 8 % out [7:0] $end
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$upscope $end
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$scope module i_sub2 $end
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$var wire 1 # clk $end
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$scope module i_sub3 $end
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$var wire 1 * clk $end
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$var wire 8 % in [7:0] $end
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$var wire 8 & out [7:0] $end
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$upscope $end
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$scope module i_sub3 $end
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$var wire 1 # clk $end
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$var wire 8 & in [7:0] $end
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$var wire 8 ' out [7:0] $end
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$upscope $end
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$scope module i_sub3_2 $end
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$var wire 1 # clk $end
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$var wire 8 & in [7:0] $end
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$var wire 8 * out [7:0] $end
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$var wire 1 * clk $end
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$var wire 8 % in [7:0] $end
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$var wire 8 ' out [7:0] $end
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$upscope $end
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$upscope $end
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$upscope $end
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@ -122,12 +122,12 @@ $timescale 1ps $end
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$upscope $end
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$scope module top.t.i_sub1 $end
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$var wire 1 D clk $end
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$var wire 8 E in [7:0] $end
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$var wire 8 E in [11:4] $end
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$var wire 8 F out [7:0] $end
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$scope module sub1 $end
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$var wire 1 D clk $end
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$var wire 8 G ff [7:0] $end
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$var wire 8 E in [7:0] $end
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$var wire 8 E in [11:4] $end
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$var wire 8 F out [7:0] $end
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$upscope $end
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$upscope $end
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@ -1016,14 +1016,14 @@ $enddefinitions $end
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#0
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0#
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b00000000 #
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b00000000 $
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b00000000 %
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b00000000 &
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b00000000 '
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b00000000 (
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b00000000 )
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b00000000 *
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0*
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b00000000000000000000000000000000 +
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0-
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b00000000 .
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@ -1502,11 +1502,11 @@ b00000001 ')
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b00000011 ()
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b00000000000000000000000000000001 ))
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#10
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1#
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b00000001 %
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b00000001 $
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b00000010 %
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b00000010 &
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b00000010 '
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b00000010 *
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1*
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b00000000000000000000000000000001 +
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1-
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b00000010 .
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@ -1677,7 +1677,7 @@ b0000000000000000000000000000000000000000000000000000000000000000000000000000000
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#13
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#14
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#15
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0#
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0*
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0-
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08
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0?
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@ -1703,11 +1703,11 @@ b0000000000000000000000000000000000000000000000000000000000000000000000000000000
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#18
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#19
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#20
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1#
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b00000010 $
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b00000101 &
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b00000010 #
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b00000101 %
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b00000011 &
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b00000011 '
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b00000011 *
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1*
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b00000000000000000000000000000010 +
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1-
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b00000011 .
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@ -2017,7 +2017,7 @@ b00000001 #)
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#23
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#24
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#25
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0#
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0*
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0-
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08
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0?
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@ -2043,13 +2043,13 @@ b00000001 #)
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#28
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#29
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#30
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1#
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b00000011 #
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b00000011 $
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b00000011 %
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b00000111 &
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b00000111 %
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b00000101 &
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b00000101 '
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b00000010 (
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b00000101 *
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1*
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b00000000000000000000000000000011 +
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1-
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b00000101 .
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@ -2345,7 +2345,7 @@ b00000000 #)
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#33
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#34
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#35
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0#
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0*
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0-
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08
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0?
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@ -2371,13 +2371,13 @@ b00000000 #)
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#38
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#39
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#40
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1#
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b00000101 $
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b00000100 %
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b00000101 #
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b00000100 $
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b00001000 %
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b00001000 &
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b00001000 '
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b00000011 (
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b00001000 *
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1*
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b00000000000000000000000000000100 +
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1-
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b00001000 .
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@ -2673,7 +2673,7 @@ b00000001 #)
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#43
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#44
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#45
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0#
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0*
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0-
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08
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0?
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@ -2699,12 +2699,12 @@ b00000001 #)
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#48
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#49
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#50
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1#
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b00001000 $
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b00000110 %
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b00001000 #
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b00000110 $
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b00001010 &
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b00001010 '
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b00000101 (
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b00001010 *
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1*
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b00000000000000000000000000000101 +
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1-
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b00001010 .
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@ -2992,7 +2992,7 @@ b00000000 #)
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#53
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#54
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#55
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0#
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0*
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0-
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08
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0?
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@ -3018,14 +3018,14 @@ b00000000 #)
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#58
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#59
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#60
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1#
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b00001010 $
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b00001001 %
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b00001010 &
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b00001010 #
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b00001001 $
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b00001010 %
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b00001011 &
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b00001011 '
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b00001000 (
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b00000010 )
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b00001011 *
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1*
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b00000000000000000000000000000110 +
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1-
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b00001011 .
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@ -3321,7 +3321,7 @@ b00000001 #)
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#63
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#64
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#65
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0#
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0*
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0-
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08
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0?
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@ -3347,12 +3347,12 @@ b00000001 #)
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#68
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#69
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#70
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1#
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b00001011 #
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b00001011 $
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b00001011 %
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b00001011 &
|
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b00001010 (
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b00000011 )
|
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1*
|
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b00000000000000000000000000000111 +
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1-
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b00001010 /
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@ -3638,7 +3638,7 @@ b00000000 #)
|
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#73
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#74
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#75
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0#
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0*
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0-
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08
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0?
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@ -3664,13 +3664,13 @@ b00000000 #)
|
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#78
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#79
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#80
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1#
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b00001100 %
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b00001100 $
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b00001101 %
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b00001101 &
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b00001101 '
|
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b00001011 (
|
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b00000101 )
|
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b00001101 *
|
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1*
|
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b00000000000000000000000000001000 +
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1-
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b00001101 .
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@ -3968,7 +3968,7 @@ b00000001 #)
|
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#83
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#84
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#85
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0#
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0*
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0-
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08
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0?
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@ -3994,12 +3994,12 @@ b00000001 #)
|
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#88
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#89
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#90
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1#
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b00001101 $
|
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b00010000 &
|
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b00001101 #
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b00010000 %
|
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b00001110 &
|
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b00001110 '
|
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b00001000 )
|
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b00001110 *
|
||||
1*
|
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b00000000000000000000000000001001 +
|
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1-
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b00001110 .
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@ -4295,7 +4295,7 @@ b00000000 #)
|
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#93
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#94
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#95
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0#
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0*
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0-
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08
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0?
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@ -4321,14 +4321,14 @@ b00000000 #)
|
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#98
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#99
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#100
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1#
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b00001110 #
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b00001110 $
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b00001110 %
|
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b00010010 &
|
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b00010010 %
|
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b00010000 &
|
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b00010000 '
|
||||
b00001101 (
|
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b00001010 )
|
||||
b00010000 *
|
||||
1*
|
||||
b00000000000000000000000000001010 +
|
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1-
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||||
b00010000 .
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||||
@ -4627,7 +4627,7 @@ b00000001 #)
|
||||
#103
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||||
#104
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||||
#105
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||||
0#
|
||||
0*
|
||||
0-
|
||||
08
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0?
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||||
@ -4653,14 +4653,14 @@ b00000001 #)
|
||||
#108
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||||
#109
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||||
#110
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||||
1#
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||||
b00010000 $
|
||||
b00001111 %
|
||||
b00010000 #
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||||
b00001111 $
|
||||
b00010011 %
|
||||
b00010011 &
|
||||
b00010011 '
|
||||
b00001110 (
|
||||
b00001011 )
|
||||
b00010011 *
|
||||
1*
|
||||
b00000000000000000000000000001011 +
|
||||
1-
|
||||
b00010011 .
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||||
@ -4958,7 +4958,7 @@ b00000000 #)
|
||||
#113
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||||
#114
|
||||
#115
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||||
0#
|
||||
0*
|
||||
0-
|
||||
08
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||||
0?
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||||
@ -4984,12 +4984,12 @@ b00000000 #)
|
||||
#118
|
||||
#119
|
||||
#120
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||||
1#
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||||
b00010011 $
|
||||
b00010001 %
|
||||
b00010011 #
|
||||
b00010001 $
|
||||
b00010101 &
|
||||
b00010101 '
|
||||
b00010000 (
|
||||
b00010101 *
|
||||
1*
|
||||
b00000000000000000000000000001100 +
|
||||
1-
|
||||
b00010101 .
|
||||
@ -5277,7 +5277,7 @@ b00000001 #)
|
||||
#123
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||||
#124
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||||
#125
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||||
0#
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||||
0*
|
||||
0-
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||||
08
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||||
0?
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||||
@ -5303,14 +5303,14 @@ b00000001 #)
|
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#128
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#129
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||||
#130
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||||
1#
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||||
b00010101 $
|
||||
b00010100 %
|
||||
b00010101 &
|
||||
b00010101 #
|
||||
b00010100 $
|
||||
b00010101 %
|
||||
b00010110 &
|
||||
b00010110 '
|
||||
b00010011 (
|
||||
b00001101 )
|
||||
b00010110 *
|
||||
1*
|
||||
b00000000000000000000000000001101 +
|
||||
1-
|
||||
b00010110 .
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||||
@ -5606,7 +5606,7 @@ b00000000 #)
|
||||
#133
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||||
#134
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||||
#135
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||||
0#
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||||
0*
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||||
0-
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||||
08
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||||
0?
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||||
@ -5632,12 +5632,12 @@ b00000000 #)
|
||||
#138
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||||
#139
|
||||
#140
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||||
1#
|
||||
b00010110 #
|
||||
b00010110 $
|
||||
b00010110 %
|
||||
b00010110 &
|
||||
b00010101 (
|
||||
b00001110 )
|
||||
1*
|
||||
b00000000000000000000000000001110 +
|
||||
1-
|
||||
b00010101 /
|
||||
@ -5923,7 +5923,7 @@ b00000001 #)
|
||||
#143
|
||||
#144
|
||||
#145
|
||||
0#
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -5949,13 +5949,13 @@ b00000001 #)
|
||||
#148
|
||||
#149
|
||||
#150
|
||||
1#
|
||||
b00010111 %
|
||||
b00010111 $
|
||||
b00011000 %
|
||||
b00011000 &
|
||||
b00011000 '
|
||||
b00010110 (
|
||||
b00010000 )
|
||||
b00011000 *
|
||||
1*
|
||||
b00000000000000000000000000001111 +
|
||||
1-
|
||||
b00011000 .
|
||||
@ -6253,7 +6253,7 @@ b00000000 #)
|
||||
#153
|
||||
#154
|
||||
#155
|
||||
0#
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -6279,12 +6279,12 @@ b00000000 #)
|
||||
#158
|
||||
#159
|
||||
#160
|
||||
1#
|
||||
b00011000 $
|
||||
b00011011 &
|
||||
b00011000 #
|
||||
b00011011 %
|
||||
b00011001 &
|
||||
b00011001 '
|
||||
b00010011 )
|
||||
b00011001 *
|
||||
1*
|
||||
b00000000000000000000000000010000 +
|
||||
1-
|
||||
b00011001 .
|
||||
@ -6580,7 +6580,7 @@ b00000001 #)
|
||||
#163
|
||||
#164
|
||||
#165
|
||||
0#
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -6606,14 +6606,14 @@ b00000001 #)
|
||||
#168
|
||||
#169
|
||||
#170
|
||||
1#
|
||||
b00011001 #
|
||||
b00011001 $
|
||||
b00011001 %
|
||||
b00011101 &
|
||||
b00011101 %
|
||||
b00011011 &
|
||||
b00011011 '
|
||||
b00011000 (
|
||||
b00010101 )
|
||||
b00011011 *
|
||||
1*
|
||||
b00000000000000000000000000010001 +
|
||||
1-
|
||||
b00011011 .
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
$date
|
||||
Tue Feb 22 23:53:34 2022
|
||||
Tue Oct 18 17:19:55 2022
|
||||
|
||||
$end
|
||||
$version
|
||||
@ -42,7 +42,7 @@ $upscope $end
|
||||
$upscope $end
|
||||
$scope module i_sub1 $end
|
||||
$var wire 1 ! clk $end
|
||||
$var wire 8 " in [7:0] $end
|
||||
$var wire 8 " in [11:4] $end
|
||||
$var wire 8 # out [7:0] $end
|
||||
$upscope $end
|
||||
$scope module i_sub2 $end
|
||||
@ -129,11 +129,11 @@ $upscope $end
|
||||
$upscope $end
|
||||
$scope module top.t.i_sub1 $end
|
||||
$var wire 1 > clk $end
|
||||
$var wire 8 ? in [7:0] $end
|
||||
$var wire 8 ? in [11:4] $end
|
||||
$var wire 8 @ out [7:0] $end
|
||||
$scope module sub1 $end
|
||||
$var wire 1 > clk $end
|
||||
$var wire 8 ? in [7:0] $end
|
||||
$var wire 8 ? in [11:4] $end
|
||||
$var wire 8 @ out [7:0] $end
|
||||
$var logic 8 A ff [7:0] $end
|
||||
$upscope $end
|
||||
|
||||
@ -1,58 +1,58 @@
|
||||
$version Generated by VerilatedVcd $end
|
||||
$date Sat Nov 27 16:51:43 2021 $end
|
||||
$date Tue Oct 18 17:20:50 2022 $end
|
||||
$timescale 1ps $end
|
||||
|
||||
$scope module top $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$scope module t $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 32 + count [31:0] $end
|
||||
$var wire 8 # out0 [7:0] $end
|
||||
$var wire 8 $ out1 [7:0] $end
|
||||
$var wire 8 % out2 [7:0] $end
|
||||
$var wire 8 & out3 [7:0] $end
|
||||
$var wire 8 * out3_2 [7:0] $end
|
||||
$var wire 8 ' out5 [7:0] $end
|
||||
$var wire 8 ( out6 [7:0] $end
|
||||
$var wire 8 ' out3_2 [7:0] $end
|
||||
$var wire 8 ( out5 [7:0] $end
|
||||
$var wire 8 ) out6 [7:0] $end
|
||||
$scope module i_delay0 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 & in [7:0] $end
|
||||
$var wire 8 ' out [7:0] $end
|
||||
$upscope $end
|
||||
$scope module i_delay1 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 8 ' in [7:0] $end
|
||||
$var wire 8 ( out [7:0] $end
|
||||
$upscope $end
|
||||
$scope module i_delay1 $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 ( in [7:0] $end
|
||||
$var wire 8 ) out [7:0] $end
|
||||
$upscope $end
|
||||
$scope module i_sub0 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 & in [7:0] $end
|
||||
$var wire 8 # out [7:0] $end
|
||||
$scope module i_sub0 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 & in [7:0] $end
|
||||
$var wire 8 # out [7:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope module i_sub1 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 8 # in [7:0] $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 # in [11:4] $end
|
||||
$var wire 8 $ out [7:0] $end
|
||||
$upscope $end
|
||||
$scope module i_sub2 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 $ in [7:0] $end
|
||||
$var wire 8 % out [7:0] $end
|
||||
$upscope $end
|
||||
$scope module i_sub3 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 % in [7:0] $end
|
||||
$var wire 8 & out [7:0] $end
|
||||
$upscope $end
|
||||
$scope module i_sub3_2 $end
|
||||
$var wire 1 ) clk $end
|
||||
$var wire 1 * clk $end
|
||||
$var wire 8 % in [7:0] $end
|
||||
$var wire 8 * out [7:0] $end
|
||||
$var wire 8 ' out [7:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
@ -123,12 +123,12 @@ $timescale 1ps $end
|
||||
$upscope $end
|
||||
$scope module top.t.i_sub1 $end
|
||||
$var wire 1 D clk $end
|
||||
$var wire 8 E in [7:0] $end
|
||||
$var wire 8 E in [11:4] $end
|
||||
$var wire 8 F out [7:0] $end
|
||||
$scope module sub1 $end
|
||||
$var wire 1 D clk $end
|
||||
$var wire 8 G ff [7:0] $end
|
||||
$var wire 8 E in [7:0] $end
|
||||
$var wire 8 E in [11:4] $end
|
||||
$var wire 8 F out [7:0] $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
@ -1023,8 +1023,8 @@ b00000000 %
|
||||
b00000000 &
|
||||
b00000000 '
|
||||
b00000000 (
|
||||
0)
|
||||
b00000000 *
|
||||
b00000000 )
|
||||
0*
|
||||
b00000000000000000000000000000000 +
|
||||
0-
|
||||
b00000000 .
|
||||
@ -1506,8 +1506,8 @@ b00000000000000000000000000000001 ))
|
||||
b00000001 $
|
||||
b00000010 %
|
||||
b00000010 &
|
||||
1)
|
||||
b00000010 *
|
||||
b00000010 '
|
||||
1*
|
||||
b00000000000000000000000000000001 +
|
||||
1-
|
||||
b00000010 .
|
||||
@ -1674,7 +1674,7 @@ b0000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 t(
|
||||
b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101 x(
|
||||
#15
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -1699,8 +1699,8 @@ b0000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
b00000010 #
|
||||
b00000101 %
|
||||
b00000011 &
|
||||
1)
|
||||
b00000011 *
|
||||
b00000011 '
|
||||
1*
|
||||
b00000000000000000000000000000010 +
|
||||
1-
|
||||
b00000011 .
|
||||
@ -2006,7 +2006,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#25
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -2032,9 +2032,9 @@ b00000011 #
|
||||
b00000011 $
|
||||
b00000111 %
|
||||
b00000101 &
|
||||
b00000010 '
|
||||
1)
|
||||
b00000101 *
|
||||
b00000101 '
|
||||
b00000010 (
|
||||
1*
|
||||
b00000000000000000000000000000011 +
|
||||
1-
|
||||
b00000101 .
|
||||
@ -2326,7 +2326,7 @@ b00000000 !)
|
||||
b00000000 ")
|
||||
b00000000 #)
|
||||
#35
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -2352,9 +2352,9 @@ b00000101 #
|
||||
b00000100 $
|
||||
b00001000 %
|
||||
b00001000 &
|
||||
b00000011 '
|
||||
1)
|
||||
b00001000 *
|
||||
b00001000 '
|
||||
b00000011 (
|
||||
1*
|
||||
b00000000000000000000000000000100 +
|
||||
1-
|
||||
b00001000 .
|
||||
@ -2646,7 +2646,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#45
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -2671,9 +2671,9 @@ b00000001 #)
|
||||
b00001000 #
|
||||
b00000110 $
|
||||
b00001010 &
|
||||
b00000101 '
|
||||
1)
|
||||
b00001010 *
|
||||
b00001010 '
|
||||
b00000101 (
|
||||
1*
|
||||
b00000000000000000000000000000101 +
|
||||
1-
|
||||
b00001010 .
|
||||
@ -2957,7 +2957,7 @@ b00000000 !)
|
||||
b00000000 ")
|
||||
b00000000 #)
|
||||
#55
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -2983,10 +2983,10 @@ b00001010 #
|
||||
b00001001 $
|
||||
b00001010 %
|
||||
b00001011 &
|
||||
b00001000 '
|
||||
b00000010 (
|
||||
1)
|
||||
b00001011 *
|
||||
b00001011 '
|
||||
b00001000 (
|
||||
b00000010 )
|
||||
1*
|
||||
b00000000000000000000000000000110 +
|
||||
1-
|
||||
b00001011 .
|
||||
@ -3278,7 +3278,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#65
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -3303,9 +3303,9 @@ b00000001 #)
|
||||
b00001011 #
|
||||
b00001011 $
|
||||
b00001011 %
|
||||
b00001010 '
|
||||
b00000011 (
|
||||
1)
|
||||
b00001010 (
|
||||
b00000011 )
|
||||
1*
|
||||
b00000000000000000000000000000111 +
|
||||
1-
|
||||
b00001010 /
|
||||
@ -3587,7 +3587,7 @@ b00000000 !)
|
||||
b00000000 ")
|
||||
b00000000 #)
|
||||
#75
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -3612,10 +3612,10 @@ b00000000 #)
|
||||
b00001100 $
|
||||
b00001101 %
|
||||
b00001101 &
|
||||
b00001011 '
|
||||
b00000101 (
|
||||
1)
|
||||
b00001101 *
|
||||
b00001101 '
|
||||
b00001011 (
|
||||
b00000101 )
|
||||
1*
|
||||
b00000000000000000000000000001000 +
|
||||
1-
|
||||
b00001101 .
|
||||
@ -3909,7 +3909,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#85
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -3934,9 +3934,9 @@ b00000001 #)
|
||||
b00001101 #
|
||||
b00010000 %
|
||||
b00001110 &
|
||||
b00001000 (
|
||||
1)
|
||||
b00001110 *
|
||||
b00001110 '
|
||||
b00001000 )
|
||||
1*
|
||||
b00000000000000000000000000001001 +
|
||||
1-
|
||||
b00001110 .
|
||||
@ -4228,7 +4228,7 @@ b00000000 !)
|
||||
b00000000 ")
|
||||
b00000000 #)
|
||||
#95
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -4254,10 +4254,10 @@ b00001110 #
|
||||
b00001110 $
|
||||
b00010010 %
|
||||
b00010000 &
|
||||
b00001101 '
|
||||
b00001010 (
|
||||
1)
|
||||
b00010000 *
|
||||
b00010000 '
|
||||
b00001101 (
|
||||
b00001010 )
|
||||
1*
|
||||
b00000000000000000000000000001010 +
|
||||
1-
|
||||
b00010000 .
|
||||
@ -4552,7 +4552,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#105
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -4578,10 +4578,10 @@ b00010000 #
|
||||
b00001111 $
|
||||
b00010011 %
|
||||
b00010011 &
|
||||
b00001110 '
|
||||
b00001011 (
|
||||
1)
|
||||
b00010011 *
|
||||
b00010011 '
|
||||
b00001110 (
|
||||
b00001011 )
|
||||
1*
|
||||
b00000000000000000000000000001011 +
|
||||
1-
|
||||
b00010011 .
|
||||
@ -4875,7 +4875,7 @@ b00000000 !)
|
||||
b00000000 ")
|
||||
b00000000 #)
|
||||
#115
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -4900,9 +4900,9 @@ b00000000 #)
|
||||
b00010011 #
|
||||
b00010001 $
|
||||
b00010101 &
|
||||
b00010000 '
|
||||
1)
|
||||
b00010101 *
|
||||
b00010101 '
|
||||
b00010000 (
|
||||
1*
|
||||
b00000000000000000000000000001100 +
|
||||
1-
|
||||
b00010101 .
|
||||
@ -5186,7 +5186,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#125
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -5212,10 +5212,10 @@ b00010101 #
|
||||
b00010100 $
|
||||
b00010101 %
|
||||
b00010110 &
|
||||
b00010011 '
|
||||
b00001101 (
|
||||
1)
|
||||
b00010110 *
|
||||
b00010110 '
|
||||
b00010011 (
|
||||
b00001101 )
|
||||
1*
|
||||
b00000000000000000000000000001101 +
|
||||
1-
|
||||
b00010110 .
|
||||
@ -5507,7 +5507,7 @@ b00000000 !)
|
||||
b00000000 ")
|
||||
b00000000 #)
|
||||
#135
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -5532,9 +5532,9 @@ b00000000 #)
|
||||
b00010110 #
|
||||
b00010110 $
|
||||
b00010110 %
|
||||
b00010101 '
|
||||
b00001110 (
|
||||
1)
|
||||
b00010101 (
|
||||
b00001110 )
|
||||
1*
|
||||
b00000000000000000000000000001110 +
|
||||
1-
|
||||
b00010101 /
|
||||
@ -5816,7 +5816,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#145
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -5841,10 +5841,10 @@ b00000001 #)
|
||||
b00010111 $
|
||||
b00011000 %
|
||||
b00011000 &
|
||||
b00010110 '
|
||||
b00010000 (
|
||||
1)
|
||||
b00011000 *
|
||||
b00011000 '
|
||||
b00010110 (
|
||||
b00010000 )
|
||||
1*
|
||||
b00000000000000000000000000001111 +
|
||||
1-
|
||||
b00011000 .
|
||||
@ -6138,7 +6138,7 @@ b00000000 !)
|
||||
b00000000 ")
|
||||
b00000000 #)
|
||||
#155
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -6163,9 +6163,9 @@ b00000000 #)
|
||||
b00011000 #
|
||||
b00011011 %
|
||||
b00011001 &
|
||||
b00010011 (
|
||||
1)
|
||||
b00011001 *
|
||||
b00011001 '
|
||||
b00010011 )
|
||||
1*
|
||||
b00000000000000000000000000010000 +
|
||||
1-
|
||||
b00011001 .
|
||||
@ -6457,7 +6457,7 @@ b00000011 !)
|
||||
b00000010 ")
|
||||
b00000001 #)
|
||||
#165
|
||||
0)
|
||||
0*
|
||||
0-
|
||||
08
|
||||
0?
|
||||
@ -6483,10 +6483,10 @@ b00011001 #
|
||||
b00011001 $
|
||||
b00011101 %
|
||||
b00011011 &
|
||||
b00011000 '
|
||||
b00010101 (
|
||||
1)
|
||||
b00011011 *
|
||||
b00011011 '
|
||||
b00011000 (
|
||||
b00010101 )
|
||||
1*
|
||||
b00000000000000000000000000010001 +
|
||||
1-
|
||||
b00011011 .
|
||||
|
||||
Loading…
Reference in New Issue
Block a user