forked from github/verilator
Fix sign extension of pattern members, bug882.
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@ -25,6 +25,8 @@ indicates the contributor was also the author of the fix; Thanks!
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**** Fix mis-optimizing gate assignments in unopt blocks, bug881. [Mike Thyer]
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**** Fix sign extension of pattern members, bug882. [Iztok Jeras]
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**** Fix clang compile warnings.
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@ -1741,7 +1741,7 @@ private:
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if (nodep->lhssp()->nextp()) nodep->v3fatalSrc("PatMember value should be singular w/replicates removed");
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// Need to propagate assignment type downwards, even on prelim
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nodep->iterateChildren(*this,WidthVP(nodep->dtypep(),BOTH).p());
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iterateCheck(nodep,"Pattern value",nodep->lhssp(),CONTEXT,FINAL,vdtypep,EXTEND_EXP);
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iterateCheck(nodep,"Pattern value",nodep->lhssp(),CONTEXT,FINAL,vdtypep,EXTEND_LHS);
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}
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int visitPatMemberRep(AstPatMember* nodep) {
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uint32_t times = 1;
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@ -3,9 +3,9 @@
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2015 by Iztok Jeras.
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); end while(0)
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`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0)
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module t (/*AUTOARG*/);
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module t (/*AUTOARG*/);
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// signed source
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logic signed [8-1:0] src;
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@ -17,13 +17,16 @@ module t (/*AUTOARG*/);
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} dst;
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initial begin
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// bug882
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// verilator lint_off WIDTH
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src = 8'sh05;
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dst = '{s: src, u: src};
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`checkh (dst.s, 16'h0005);
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`checkh (dst.u, 16'h0005);
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src = 8'shf5;
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dst = '{s: src, u: src};
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`checkh (dst.s, 16'hfff5);
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`checkh (dst.u, 16'hfff5);
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// verilator lint_on WIDTH
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