forked from github/verilator
28 lines
585 B
Coq
28 lines
585 B
Coq
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2013 by Charlie Brej.
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module submodule ();
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// This bug only appears when not inlining
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// verilator no_inline_module
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initial begin
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$write("d");
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end
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final begin
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$write("d");
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end
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endmodule
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module t ();
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generate
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for (genvar i = 0; i < 100; i = i + 1) begin : module_set
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submodule u_submodule ();
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end
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endgenerate
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initial begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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