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Add re-programmable memory TODO

Mario Romero 2023-08-07 19:20:19 +00:00
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commit e981894064
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Instruction-Memory.md

@ -16,3 +16,5 @@
</table>
The instruction memory is read only and the data can be specified using the `FILE_PATH` parameter. The file to read needs to be in the hexadecimal format provided by the `$readmemh` function of the SystemVerilog standard. Binary executables can be transformed to the hexadecimal format using `objcopy` or more convenient using the `rvscc_bin_to_verilog_mem_file` CMake function from [cmake/utils.cmake](https://git.1159.cl/Mario1159/RVSCC/src/branch/main/cmake/utils.cmake) that is being used when building the test or the sandbox project.
TODO: Add re-programmable memory