From e9818940641bfe4f3402c3d94b1d8a80e5a0392c Mon Sep 17 00:00:00 2001 From: Mario Romero Date: Mon, 7 Aug 2023 19:20:19 +0000 Subject: [PATCH] Add re-programmable memory TODO --- Instruction-Memory.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Instruction-Memory.md b/Instruction-Memory.md index 8b04de9..33b944e 100644 --- a/Instruction-Memory.md +++ b/Instruction-Memory.md @@ -16,3 +16,5 @@ The instruction memory is read only and the data can be specified using the `FILE_PATH` parameter. The file to read needs to be in the hexadecimal format provided by the `$readmemh` function of the SystemVerilog standard. Binary executables can be transformed to the hexadecimal format using `objcopy` or more convenient using the `rvscc_bin_to_verilog_mem_file` CMake function from [cmake/utils.cmake](https://git.1159.cl/Mario1159/RVSCC/src/branch/main/cmake/utils.cmake) that is being used when building the test or the sandbox project. + +TODO: Add re-programmable memory