RVSCC/rtl
Mario Romero bd2f58d5f6
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Change name scheme and add tests
2023-02-26 20:26:11 -03:00
..
alu_decoder.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
alu.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
cache_controller.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
cache_memory.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
control_unit.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
data_memory_if.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
data_memory.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
hazard_unit.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
imm_extend.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
instr_memory.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
jump_control.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
main_decoder.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
pipelined_control_unit.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
pipelined_cpu.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
priority_encoder.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
register_file.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
rotate_cru.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
rv32i_defs.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
single_cycle_datapath.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
two_way_lru_cache.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00
two_way_lru_cru.sv Change name scheme and add tests 2023-02-26 20:26:11 -03:00