119 lines
3.9 KiB
CMake
119 lines
3.9 KiB
CMake
include(${PROJECT_SOURCE_DIR}/cmake/utils.cmake)
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find_package(verilator HINTS $ENV{VERILATOR_ROOT})
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if (NOT verilator_FOUND)
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message(FATAL_ERROR "Verilator was not found. Either install it, or set the VERILATOR_ROOT environment variable")
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endif()
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set(THREADS_PREFER_PTHREAD_FLAG ON)
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find_package(Threads REQUIRED)
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find_package(SystemCLanguage QUIET)
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rvscc_add_test(
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NAME alu
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TOP test_alu
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
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${PROJECT_SOURCE_DIR}/rtl/alu.sv
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${PROJECT_SOURCE_DIR}/test/test_alu.sv
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)
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rvscc_add_test(
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NAME priority-encoder
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TOP test_priority_encoder
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/priority_encoder.sv
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${PROJECT_SOURCE_DIR}/test/test_priority_encoder.sv
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)
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rvscc_add_test(
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NAME data-memory
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TOP test_data_memory
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
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${PROJECT_SOURCE_DIR}/rtl/data_memory_if.sv
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${PROJECT_SOURCE_DIR}/rtl/data_memory.sv
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${PROJECT_SOURCE_DIR}/test/test_data_memory.sv
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)
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rvscc_add_test(
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NAME imm-extend
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TOP test_imm_extend
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/imm_extend.sv
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${PROJECT_SOURCE_DIR}/test/test_imm_extend.sv
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)
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rvscc_add_test(
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NAME register-file
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TOP test_register_file
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
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${PROJECT_SOURCE_DIR}/rtl/register_file.sv
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${PROJECT_SOURCE_DIR}/test/test_register_file.sv
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)
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rvscc_add_test(
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NAME instruction_memory TOP test_instr_memory
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
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${PROJECT_SOURCE_DIR}/rtl/instr_memory_if.sv
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${PROJECT_SOURCE_DIR}/rtl/instr_memory.sv
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${PROJECT_SOURCE_DIR}/test/test_instr_memory.sv
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)
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rvscc_add_test(
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NAME single-cycle-core
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TOP test_single_cycle_core
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
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${PROJECT_SOURCE_DIR}/rtl/single_cycle_datapath.sv
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${PROJECT_SOURCE_DIR}/rtl/data_memory_if.sv
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${PROJECT_SOURCE_DIR}/rtl/data_memory.sv
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${PROJECT_SOURCE_DIR}/rtl/instr_memory_if.sv
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${PROJECT_SOURCE_DIR}/rtl/instr_memory.sv
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${PROJECT_SOURCE_DIR}/rtl/jump_control.sv
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${PROJECT_SOURCE_DIR}/rtl/control_unit.sv
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${PROJECT_SOURCE_DIR}/rtl/alu_decoder.sv
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${PROJECT_SOURCE_DIR}/rtl/main_decoder.sv
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${PROJECT_SOURCE_DIR}/rtl/register_file.sv
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${PROJECT_SOURCE_DIR}/rtl/imm_extend.sv
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${PROJECT_SOURCE_DIR}/rtl/alu.sv
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${PROJECT_SOURCE_DIR}/test/test_single_cycle_core.sv
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)
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rvscc_add_test(
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NAME five-stage-pipeline-core
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TOP test_five_stage_pipeline_core
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
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${PROJECT_SOURCE_DIR}/rtl/five_stage_pipeline_datapath.sv
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${PROJECT_SOURCE_DIR}/rtl/data_memory_if.sv
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${PROJECT_SOURCE_DIR}/rtl/data_memory.sv
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${PROJECT_SOURCE_DIR}/rtl/instr_memory_if.sv
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${PROJECT_SOURCE_DIR}/rtl/instr_memory.sv
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${PROJECT_SOURCE_DIR}/rtl/jump_control.sv
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${PROJECT_SOURCE_DIR}/rtl/control_unit.sv
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${PROJECT_SOURCE_DIR}/rtl/alu_decoder.sv
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${PROJECT_SOURCE_DIR}/rtl/main_decoder.sv
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${PROJECT_SOURCE_DIR}/rtl/register_file.sv
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${PROJECT_SOURCE_DIR}/rtl/imm_extend.sv
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${PROJECT_SOURCE_DIR}/rtl/alu.sv
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${PROJECT_SOURCE_DIR}/rtl/hazard_unit.sv
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${PROJECT_SOURCE_DIR}/test/test_five_stage_pipeline_core.sv
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)
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rvscc_add_test(
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NAME cache-memory
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TOP test_cache_memory
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/cache_memory.sv
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${PROJECT_SOURCE_DIR}/rtl/priority_encoder.sv
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${PROJECT_SOURCE_DIR}/test/test_cache_memory.sv
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)
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rvscc_add_test(
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NAME two-way-lru-cache
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TOP test_two_way_lru_cache
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SOURCES ${PROJECT_SOURCE_DIR}/rtl/rv32i_defs.sv
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${PROJECT_SOURCE_DIR}/rtl/two_way_lru_cache.sv
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${PROJECT_SOURCE_DIR}/rtl/two_way_lru_cru.sv
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${PROJECT_SOURCE_DIR}/rtl/data_memory_if.sv
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${PROJECT_SOURCE_DIR}/rtl/cache_memory.sv
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${PROJECT_SOURCE_DIR}/rtl/cache_controller.sv
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${PROJECT_SOURCE_DIR}/rtl/priority_encoder.sv
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${PROJECT_SOURCE_DIR}/test/test_two_way_lru_cache.sv
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)
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