63 lines
2.9 KiB
Markdown
63 lines
2.9 KiB
Markdown
# RISC-V Simple Core Collection
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Collection of SystemVerilog RV32I cores and modules
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## Table of contents
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- [Features](#features)
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- [Directory structure](#directory-structure)
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- [Requirements](#requirements)
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- [Build](#build)
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- [Tests](#tests)
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## Features
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- Single cycle processor
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- 5-Stage pipelined processor with hazard detection
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- N-Way associative cache memory
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## Directory structure
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.
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├── fw # Firmware
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│ ├── sandbox # C/Assembly sandbox firmware source
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│ └── test # Assembly programs used for testbenchs
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├── include # SystemVerilog include directory
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├── rtl # SystemVerilog RTL modules
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├── scripts # Utility scripts
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└── test # SystemVerilog testbenchs
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## Requirements
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- Verilator or another SystemVerilog simulator
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- CMake
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- 32-bit GNU RISC-V toolchain
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> If your package manager does not provide the RISC-V GNU toolchain you can either download the binaries from the [xPack GNU RISC-V Embedded GCC](https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases) package or it can be compiled from their [main repository](https://github.com/riscv-collab/riscv-gnu-toolchain). Also you can take a look to the [docker enviroment](#docker-enviroment) provided.
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### Docker enviroment
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There is a docker enviroment image with all the dependencies already pre-installed.
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For getting docker check their [installation instruction site](https://docs.docker.com/get-docker/).
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> **Tip:** If you run into problems running docker make sure you have:
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> - **WSL2** installed in case of Windows
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> - **Secure Boot disabled** and **Virtualization enabled** in your BIOS settings
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To set up the enviroment you can create a [dev enviroment](https://docs.docker.com/desktop/dev-environments) pointing to this repository or you can pull the image directly from the container registry and then run it:
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```
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docker pull git.1159.cl/mario1159/rvscc
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docker run -it git.1159.cl/mario1159/rvscc
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```
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## Build
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To build the firmware that will be loaded in the instruction memory and the simulation testbenchs execute CMake in the project root directory using your system default toolchain (the [CMake toolchain file](cmake/riscv-toolchain.cmake) will search automatically for a RISC-V toolchain to build the firmware).
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```
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cmake -Bbuild
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cmake --build build
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```
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This will generate a `sandbox.mem` file in the `/build/fw/sandbox` folder. For other simualtors than verilator make sure to add the firmware it to your simulator sources and that the memory path matches the path specified in the memory module.
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## Tests
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After building, tests can be runned using CMake CTest.
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```
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ctest --test-dir build
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```
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## Sandbox
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For experimenting with a custom firmware, configure the project with one from the following options and use the examples in the [sandbox](fw/sandbox) folder.
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```
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cmake -Bbuild [-DSANDBOX_ASM=ON] [-DSANDBOX_C=ON]
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``` |