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90 lines
1.1 KiB
Plaintext
90 lines
1.1 KiB
Plaintext
$version Generated by VerilatedVcd $end
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$timescale 1fs $end
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$scope module $rootio $end
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$upscope $end
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$scope module tb_osc $end
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$var wire 1 # dco_out $end
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$scope module dco $end
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$var real 64 ' coarse_cw $end
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$var real 64 ' medium_cw $end
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$var real 64 ) fine_cw $end
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$var wire 1 # rf_out $end
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$var real 64 + coarse_ofst $end
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$var real 64 - coarse_res $end
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$var real 64 / medium_ofst $end
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$var real 64 1 medium_res $end
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$var real 64 3 fine_ofst $end
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$var real 64 5 fine_res $end
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$var real 64 7 coarse_delay $end
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$var real 64 9 medium_delay $end
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$var real 64 ; fine_delay $end
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$var real 64 = jitter $end
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$var wire 1 $ coarse_out $end
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$var wire 1 % medium_out $end
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$var wire 1 & fine_out $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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r8 '
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r32 )
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r6e-11 -
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r1.3e-10 /
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r6e-12 1
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r7e-11 3
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r2e-13 5
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r5.4e-10 7
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r8.9e-11 9
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r3.82e-11 ;
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r0 =
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