1
0
mirror of https://github.com/verilator/verilator.git synced 2025-04-28 19:46:54 +00:00
verilator/test_regress/t/t_hier_block_vlt.vlt

10 lines
304 B
Plaintext

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2020 by Yutetsu TAKATSUKASA
// SPDX-License-Identifier: Unlicense
`verilator_config
hier_block -module "sub?"
hier_block -module "delay" // matches recursive modules