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21 lines
444 B
Systemverilog
21 lines
444 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2023 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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typedef struct {
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bit [3:0] byte_en;
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} my_struct;
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module t (/*AUTOARG*/);
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initial begin
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my_struct ms;
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ms.byte_en[0] = 1;
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if (ms.byte_en[0] != 1) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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