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https://github.com/verilator/verilator.git
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57 lines
2.2 KiB
Python
Executable File
57 lines
2.2 KiB
Python
Executable File
#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2024 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('dist')
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root = ".."
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if not os.path.exists(root + "/.git"):
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test.skip("Not in a git repository")
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### Must trim output before and after our file list
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cmd = "cd " + root + " && git ls-files --exclude-standard"
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files = test.run_capture(cmd)
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if test.verbose:
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print("ST " + files)
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names = {}
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for filename in files.split():
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if "include/vltstd/vpi_user.h" in filename: # IEEE Standard file - can't change it
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continue
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if "include/gtkwave/" in filename: # Standard file - can't change it
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continue
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filename = os.path.join(root, filename)
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if not os.path.exists(filename):
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continue
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with open(filename, 'r', encoding='latin-1') as fh:
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for line in fh:
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if "include" not in line:
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continue
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line = line.rstrip()
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hit = (re.search(r'\bassert\.h', line) or re.search(r'\bctype\.h', line)
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or re.search(r'\berrno\.h', line) or re.search(r'\bfloat\.h', line)
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or re.search(r'\blimits\.h', line) or re.search(r'\blocale\.h', line)
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or re.search(r'\bmath\.h', line) or re.search(r'\bsetjmp\.h', line)
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or re.search(r'\bsignal\.h', line) or re.search(r'\bstdarg\.h', line)
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or re.search(r'\bstdbool\.h', line) or re.search(r'\bstddef\.h', line)
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or re.search(r'\bstdio\.h', line) or re.search(r'\bstdlib\.h', line)
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or re.search(r'\bstring\.h', line)
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or (re.search(r'\btime\.h', line) and not re.search(r'sys/time.h', line)))
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#Not yet: r'\bstdint\.h'
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if not hit:
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continue
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names[filename + ": " + line] = True
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if len(names):
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test.error("Files like stdint.h instead of cstdint:\n " +
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"\n ".join(sorted(names.keys())))
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test.passes()
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