verilator/test_regress/t/t_wrapper_context_trace0.out
Wilson Snyder 2cad22a22a
Add simulation context (VerilatedContext) (#2660). (#2813)
**   Add simulation context (VerilatedContext) to allow multiple fully independent
      models to be in the same process.  Please see the updated examples.
**   Add context->time() and context->timeInc() API calls, to set simulation time.
      These now are recommended in place of the legacy sc_time_stamp().
2021-03-07 11:01:54 -05:00

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$version Generated by VerilatedVcd $end
$date Sat Mar 6 21:09:45 2021 $end
$timescale 1ps $end
$scope module top1 $end
$var wire 1 # clk $end
$var wire 32 ' counter [31:0] $end
$var wire 1 ( done_o $end
$var wire 1 $ rst $end
$var wire 1 & stop $end
$var wire 32 % trace_number [31:0] $end
$scope module top $end
$var wire 1 # clk $end
$var wire 32 ' counter [31:0] $end
$var wire 1 ( done_o $end
$var wire 1 $ rst $end
$var wire 1 & stop $end
$var wire 32 % trace_number [31:0] $end
$upscope $end
$upscope $end
$enddefinitions $end
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