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ce10dbd11c
git-svn-id: file://localhost/svn/verilator/trunk/verilator@753 77ca24e4-aefa-0310-84f0-b9a241c72d87
160 lines
3.8 KiB
C++
160 lines
3.8 KiB
C++
// $Id$ -*- SystemC -*-
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// DESCRIPTION: Verilator Example: Top level main for invoking SystemC model
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//
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// Copyright 2003-2006 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// General Public License or the Perl Artistic License.
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//====================================================================
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#include <stdio.h>
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#include <iostream>
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#include <sys/times.h>
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#include <sys/stat.h>
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#ifdef SYSTEMPERL
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# include "systemperl.h" // SystemC + SystemPerl global header
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# include "sp_log.h" // Logging cout to files
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# include "SpTraceVcd.h"
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# include "SpCoverage.h"
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#else
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# include "systemc.h" // SystemC global header
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#endif
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#include "Vtop.h" // Top level header, generated from verilog
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Vtop *top;
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int sc_main(int argc, char* argv[]) {
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Verilated::randReset(2);
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Verilated::debug(0); // We compiled with it on for testing, turn it back off
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// General logfile
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ios::sync_with_stdio();
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#ifdef SYSTEMPERL
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sp_log_file simlog ("sim.log");
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simlog.redirect_cout();
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#endif
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// Defaults
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#if (SYSTEMC_VERSION>20011000)
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#else
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sc_time dut(1.0, sc_ns);
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sc_set_default_time_unit(dut);
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#endif
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//==========
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// Define the Clocks
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cout << ("Defining Clocks\n");
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sc_clock clk ("clk",10, 0.5, 3, true);
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sc_clock fastclk ("fastclk",2, 0.5, 2, true);
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sc_signal<bool> reset_l;
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sc_signal<bool> passed;
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sc_signal<uint32_t> in_small;
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sc_signal<sc_bv<40> > in_quad;
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sc_signal<sc_bv<70> > in_wide;
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sc_signal<uint32_t> out_small;
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sc_signal<sc_bv<40> > out_quad;
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sc_signal<sc_bv<70> > out_wide;
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//==========
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// Part under test
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#ifdef SYSTEMPERL
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SP_CELL (top, Vtop);
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SP_PIN (top, clk, clk);
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SP_PIN (top, fastclk, fastclk);
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SP_PIN (top, reset_l, reset_l);
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SP_PIN (top, passed, passed);
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SP_PIN (top, in_small, in_small);
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SP_PIN (top, in_quad, in_quad);
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SP_PIN (top, in_wide, in_wide);
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SP_PIN (top, out_small, out_small);
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SP_PIN (top, out_quad, out_quad);
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SP_PIN (top, out_wide, out_wide);
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#else
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Vtop* top = new Vtop("top");
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top->clk (clk);
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top->fastclk (fastclk);
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top->reset_l (reset_l);
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top->passed (passed);
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top->in_small (in_small);
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top->in_quad (in_quad);
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top->in_wide (in_wide);
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top->out_small (out_small);
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top->out_quad (out_quad);
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top->out_wide (out_wide);
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#endif
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//==========
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// Waves
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#if WAVES
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// Before any evaluation, need to know to calculate those signals only used for tracing
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Verilated::traceEverOn(true);
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#endif
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// You must do one evaluation before enabling waves, in order to allow
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// SystemC to interconnect everything for testing.
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cout <<("Test initialization...\n");
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reset_l = 1;
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sc_start(1);
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//==========
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// Waves
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#if WAVES
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cout << "Enabling waves...\n";
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SpTraceFile* tfp = new SpTraceFile;
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top->trace (tfp, 99);
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tfp->open ("vl_dump.vcd");
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#endif
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//==========
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// Start of Test
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cout <<("Test beginning...\n");
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reset_l = 1;
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while (VL_TIME_Q() < 60 && !passed) {
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#if WAVES
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// Flush the wave files each cycle so we can immediately see the output
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// Don't do this in "real" programs, do it in a abort() handler instead
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tfp->flush();
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#endif
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if (VL_TIME_Q() > 10) {
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reset_l = 1; // Deassert reset
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} else if (VL_TIME_Q() > 1) {
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reset_l = 0; // Assert reset
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}
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sc_start(1);
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}
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top->final();
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//==========
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// Close Waves
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#if WAVES
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tfp->close();
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#endif
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if (!passed) {
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UTIL_PRINTF ("A Test failed!!\n");
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abort();
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}
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//==========
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// Coverage analysis (since test passed)
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mkdir("logs", 0777);
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#ifdef SYSTEMPERL
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SpCoverage::write(); // Writes logs/coverage.pl
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#endif
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//==========
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// Close LogFiles
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cout << "*-* All Finished *-*\n"; // Magic if using perl's Log::Detect
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return(0);
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}
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