verilator/test_regress
Varun Koyyalagunta e0edb596ea Add duplicate clock gate optimization, msg980.
Experimental and disabled unless -OD or -O3 used (for now),
Please try it as may get some significant speedups.

Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
2013-02-20 20:14:15 -05:00
..
t Add duplicate clock gate optimization, msg980. 2013-02-20 20:14:15 -05:00
.gdbinit
.gitignore
driver.pl Add duplicate clock gate optimization, msg980. 2013-02-20 20:14:15 -05:00
input.vc
Makefile
Makefile_obj