verilator/test_regress/t/t_dedupe_clk_gate.out

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      {"type":"ASSIGN","name":"","addr":"(CC)","loc":"e,9:8,9:9","dtypep":"(DB)",
       "rhsp": [
        {"type":"CONST","name":"32'h0","addr":"(DC)","loc":"e,9:8,9:9","dtypep":"(EC)"}
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      {"type":"ASSIGN","name":"","addr":"(GC)","loc":"e,9:8,9:9","dtypep":"(PB)",
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         "condp": [
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            {"type":"TEXT","name":"","addr":"(TC)","loc":"a,0:0,0:0","shortText":"#ifdef VL_DEBUG..."},
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            {"type":"TEXT","name":"","addr":"(AD)","loc":"a,0:0,0:0","shortText":"\"Settle region did not converge.\");..."}
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              ]}
            ]}
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         "pinsp": [
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          {"type":"AND","name":"","addr":"(AL)","loc":"e,36:12,36:19","dtypep":"(PB)",
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            ]}
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              ]}
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         "pinsp": [
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          {"type":"AND","name":"","addr":"(KL)","loc":"e,59:12,59:19","dtypep":"(PB)",
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       "nodesp": [
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        {"type":"TEXT","name":"","addr":"(VM)","loc":"e,9:8,9:9","shortText":"VL_DBG_MSGF(\"         'act' region trigger index 0 is active: @(posedge t.f0.gated_clock)\\n\");..."}
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      ],"elsesp": []}
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