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Event-triggered coroutines live in two stages: 'uncommitted' and 'ready'. First they land in 'uncommitted', meaning they can't be resumed yet. Only after coroutines from the 'ready' queue are resumed, the 'uncommitted' ones are moved to the 'ready' queue, and can be resumed. This is to avoid self-triggering in situations like waiting for an event immediately after triggering it. However, there is an issue with `wait` statements. If you have a `wait(b)`, it's being translated into a loop that awaits a change in `b` as long as `b` is false. If `b` is false at first, the coroutine is put into the `uncommitted` queue. If `b` is set to true before it's committed, the coroutine won't get resumed. This patch fixes that by immediately committing event controls created from `wait` statements. That means the coroutine from the example above will get resumed from now on.
59 lines
1.8 KiB
Systemverilog
59 lines
1.8 KiB
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2022 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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`ifdef TEST_VERBOSE
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`define WRITE_VERBOSE(msg) $write(msg)
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`else
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`define WRITE_VERBOSE(msg)
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`endif
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module t;
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int a = 0;
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int b = 0;
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int c = 0;
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initial begin
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`WRITE_VERBOSE("start with a==0, b==0, c==0\n");
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#2 a = 1; `WRITE_VERBOSE("assign 1 to a\n");
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#1 a = 2; `WRITE_VERBOSE("assign 2 to a\n"); // a==2
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#1 a = 0; `WRITE_VERBOSE("assign 0 to a\n");
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#1 a = 2; `WRITE_VERBOSE("assign 2 to a\n"); // 1<a<3
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#1 b = 2; `WRITE_VERBOSE("assign 2 to b\n");
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#1 a = 1; `WRITE_VERBOSE("assign 1 to a\n"); // b>a
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#1 c = 3; `WRITE_VERBOSE("assign 3 to c\n");
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#1 c = 4; `WRITE_VERBOSE("assign 4 to c\n"); // a+b<c
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#1 c = 4; `WRITE_VERBOSE("assign 5 to b\n"); // a<b && b>c
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b = 5;
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end
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initial begin
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#1 `WRITE_VERBOSE("waiting for a==2\n");
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wait(a == 2) if (a != 2) $stop;
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`WRITE_VERBOSE("waiting for a<2\n");
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wait(a < 2) if (a >= 2) $stop;
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`WRITE_VERBOSE("waiting for a==0\n");
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wait(a == 0) if (a != 0) $stop;
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`WRITE_VERBOSE("waiting for 1<a<3\n");
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wait(a > 1 && a < 3) if (a <= 1 || a >= 3) $stop;
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`WRITE_VERBOSE("waiting for b>a\n");
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wait(b > a) if (b <= a) $stop;
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`WRITE_VERBOSE("waiting for a+b<c\n");
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wait(a + b < c) if (a + b >= c) $stop;
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`WRITE_VERBOSE("waiting for a<b && b>c\n");
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wait(a < b && b > c) if (a >= b || b <= c) $stop;
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wait(1);
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wait(0 < 1) $write("*-* All Finished *-*\n");
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$finish;
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end
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initial wait(0) $stop;
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initial wait(1 == 0) $stop;
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initial #11 $stop; // timeout
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endmodule
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