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f8c0169e82
Using the 'forceable' directive in a configuration file, or the /* verilator forceable */ metacomment on a variable declaration will generate additional public signals that allow the specified signals to be forced/released from the C++ code.
224 lines
2.3 KiB
Plaintext
224 lines
2.3 KiB
Plaintext
$version Generated by VerilatedVcd $end
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$date Sun Dec 19 19:26:33 2021 $end
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$timescale 1ps $end
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$scope module top $end
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$var wire 1 # clk $end
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$var wire 32 % cyc [31:0] $end
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$var wire 1 $ rst $end
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$scope module t $end
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$var wire 1 # clk $end
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$var wire 32 % cyc [31:0] $end
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$var wire 1 $ rst $end
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$var wire 1 & var_1 $end
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$var wire 8 ' var_8 [7:0] $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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