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38 lines
862 B
Systemverilog
38 lines
862 B
Systemverilog
// DESCRIPTION: Verilator: Large test for SystemVerilog
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2012.
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// SPDX-License-Identifier: CC0-1.0
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// Contributed by M W Lund, Atmel Corporation.
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// *****************************************************************************
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// Code ROM
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//
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// IMPORTANT!
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// Array size must be uppdated according to program size.
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// *****************************************************************************
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const
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logic [15:0] rom[0:13]
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= '{
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`LDI( R0, 11 )
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`LDI( R1, 22 )
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`LDI( R2, 33 )
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`LDI( R3, 44 )
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`STS( 0, R0 )
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`STS( 1, R1 )
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`STS( 2, R2 )
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`STS( 3, R3 )
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`LDS( R4, 0 )
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`LDS( R5, 1 )
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`LDS( R6, 0 )
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`LDS( R7, 0 )
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`JMP( 00 )
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`EOP // End of Program (NOP)
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};
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