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13 lines
293 B
Systemverilog
13 lines
293 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2024 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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module t(/*AUTOARG*/);
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initial begin
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$display(local::x);
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$finish;
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end
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endmodule
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