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64 lines
1.5 KiB
ReStructuredText
64 lines
1.5 KiB
ReStructuredText
.. Copyright 2003-2022 by Wilson Snyder.
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.. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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.. _Example C++ Execution:
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Example C++ Execution
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=====================
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We'll compile this SystemC example into a Verilated simulation binary. For
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an example that discusses the next level of detail see :ref:`Example C++
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Execution`.
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.. include:: example_common_install.rst
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Now, let's create an example Verilog file:
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.. code-block:: bash
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mkdir test_our
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cd test_our
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cat >our.v <<'EOF'
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module our;
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initial begin $display("Hello World"); $finish; end
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endmodule
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EOF
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Now we run Verilator on our little example.
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.. code-block:: bash
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verilator --binary -j 0 -Wall our.v
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Breaking this command down:
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#. :vlopt:`--binary` telling Verilator to do everything needed to create a
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simulation executable.
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#. :vlopt:`-j` `0' to Verilate using use as many CPU threads as the machine
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has.
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#. :vlopt:`-Wall` so Verilator has stronger lint warnings
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enabled.
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#. An finally, :command:`our.v` which is our SystemVerilog design file.
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And now we run it:
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.. code-block:: bash
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obj_dir/Vour
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And we get as output:
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.. code-block:: bash
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Hello World
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- our.v:2: Verilog $finish
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Really, you're better off using a Makefile to run the steps for you so when
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your source changes it will automatically run all of the appropriate steps.
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To aid this Verilator can create a makefile dependency file. For examples
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that do this see the :file:`examples` directory in the distribution.
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