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28 lines
936 B
Python
Executable File
28 lines
936 B
Python
Executable File
#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2024 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.top_filename = "t/t_trace_ub_misaligned_address.v"
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test.compile(verilator_flags2=[
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"--binary --trace", "-CFLAGS -fsanitize=address,undefined",
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"-LDFLAGS -fsanitize=address,undefined"
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])
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test.execute(
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# Some GCC versions hit an address-sanitizer bug otherwise)
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aslr_off=True)
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# Make sure that there are no additional messages (such as runtime messages
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# regarding undefined behavior).test.files_identical(test.obj_dir + "/vlt_sim.log", test.golden_filename, "logfile")
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test.passes()
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