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26 lines
329 B
Plaintext
26 lines
329 B
Plaintext
$version Generated by VerilatedVcd $end
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$timescale 1ps $end
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$scope module $rootio $end
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$upscope $end
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$scope module t $end
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$var wire 32 % CLOCK_CYCLE [31:0] $end
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$var wire 1 # rst $end
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$var wire 1 $ clk $end
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$upscope $end
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$enddefinitions $end
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#0
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1#
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0$
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b00000000000000000000000000001010 %
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#5
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1$
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#10
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0#
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0$
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#15
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1$
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#20
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1#
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