verilator/test_regress/t/t_timing_fork_taskcall.v
Krzysztof Bieganski 5de8ccbf32
Fix task calls as fork statements (#4055)
Before this patch, calling tasks directly under forks would result in each
statement of these tasks being executed concurrently. This was due to Verilator
inlining tasks most of the time. Such inlined tasks' statements would simply
replace the original call, and there would be no indication that these used to
be grouped together. Ultimately resulting in `V3Timing` treating each statement
as a separate process.

The solution is simply to wrap each fork sub-statement in a begin in `V3Begin`
(except for the ones that are begins, as that would be pointless). `V3Begin` is
already aware of forks, and is supposed to avoid issues like this one, so it
seems like a natural fit. This also protects us from similar bugs, i.e. if some
statement gets replaced or expanded into multiple statements.

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2023-03-21 13:50:53 +01:00

24 lines
471 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2023 by Antmicro Ltd.
// SPDX-License-Identifier: CC0-1.0
module t;
task foo;
#1 if ($time != 1) $stop;
#1 if ($time != 2) $stop;
#1 if ($time != 3) $stop;
endtask
initial fork
foo;
foo;
foo;
#4 begin
$write("*-* All Finished *-*\n");
$finish;
end
join
endmodule