verilator/test_regress/t/t_trace_complex_structs_lxt2.out
2018-10-07 22:04:49 -04:00

328 lines
3.1 KiB
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$date
Sun Oct 7 21:58:08 2018
$end
$version
lxt2vcd
$end
$timescale 1ns $end
$scope module top $end
$scope module $unit $end
$var wire 1 ! global_bit $end
$upscope $end
$var wire 1 " clk $end
$scope module t $end
$var wire 32 # cyc [31:0] $end
$scope module unnamedblk1 $end
$var wire 32 $ b [31:0] $end
$scope module unnamedblk2 $end
$var wire 32 % a [31:0] $end
$upscope $end
$upscope $end
$var real 1 & v_arr_real(0) $end
$var real 1 ' v_arr_real(1) $end
$var wire 2 ( v_arrp [2:1] $end
$var wire 2 ) v_arrp_arrp(3) [1:0] $end
$var wire 2 * v_arrp_arrp(4) [1:0] $end
$scope module v_arrp_strp(3) $end
$var wire 1 + b0 $end
$var wire 1 , b1 $end
$upscope $end
$scope module v_arrp_strp(4) $end
$var wire 1 - b0 $end
$var wire 1 . b1 $end
$upscope $end
$var wire 1 / v_arru(1) $end
$var wire 1 0 v_arru(2) $end
$var wire 2 1 v_arru_arrp(3) [2:1] $end
$var wire 2 2 v_arru_arrp(4) [2:1] $end
$var wire 1 3 v_arru_arru(3)(1) $end
$var wire 1 4 v_arru_arru(3)(2) $end
$var wire 1 5 v_arru_arru(4)(1) $end
$var wire 1 6 v_arru_arru(4)(2) $end
$scope module v_arru_strp(3) $end
$var wire 1 7 b0 $end
$var wire 1 8 b1 $end
$upscope $end
$scope module v_arru_strp(4) $end
$var wire 1 9 b0 $end
$var wire 1 : b1 $end
$upscope $end
$var wire 32 ; v_enumed [31:0] $end
$var wire 32 < v_enumed2 [31:0] $end
$var real 1 = v_real $end
$scope module v_str32x2(0) $end
$var wire 32 > data [31:0] $end
$upscope $end
$scope module v_str32x2(1) $end
$var wire 32 ? data [31:0] $end
$upscope $end
$scope module v_strp $end
$var wire 1 @ b0 $end
$var wire 1 A b1 $end
$upscope $end
$scope module v_strp_strp $end
$scope module x0 $end
$var wire 1 B b0 $end
$var wire 1 C b1 $end
$upscope $end
$scope module x1 $end
$var wire 1 D b0 $end
$var wire 1 E b1 $end
$upscope $end
$upscope $end
$scope module v_unip_strp $end
$scope module x1 $end
$var wire 1 F b0 $end
$var wire 1 G b1 $end
$upscope $end
$upscope $end
$var wire 1 " clk $end
$scope module v_unip_strp $end
$scope module x0 $end
$var wire 1 F b0 $end
$var wire 1 G b1 $end
$upscope $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
#0
1!
0"
b0 #
b0 $
b0 %
r0 &
r0 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
0/
00
b0 1
b0 2
03
04
05
06
07
08
09
0:
b0 ;
b0 <
r0 =
b11111111 >
b0 ?
0@
0A
0B
0C
0D
0E
0F
0G
#10
1G
1F
1E
1D
1C
1B
1A
1@
b1 ?
b11111110 >
r0.1 =
b10 <
b1 ;
1:
19
18
17
b11 2
b11 1
1.
1-
1,
1+
b11 *
b11 )
b11 (
r0.3 '
r0.2 &
b101 %
b101 $
b1 #
1"
#15
0"
#20
1"
b10 #
r0.4 &
r0.6 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
b0 1
b0 2
07
08
09
0:
b10 ;
b100 <
r0.2 =
b11111101 >
b10 ?
0@
0A
0B
0C
0D
0E
0F
0G
#25
0"
#30
1"
1G
1F
1E
1D
1C
1B
1A
1@
b11 ?
b11111100 >
r0.3 =
b110 <
b11 ;
1:
19
18
17
b11 2
b11 1
1.
1-
1,
1+
b11 *
b11 )
b11 (
r0.8999999999999999 '
r0.6000000000000001 &
b11 #
#35
0"
#40
1"
b100 #
r0.8 &
r1.2 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
b0 1
b0 2
07
08
09
0:
b100 ;
b1000 <
r0.4 =
b11111011 >
b100 ?
0@
0A
0B
0C
0D
0E
0F
0G
#45
0"
#50
1"
1G
1F
1E
1D
1C
1B
1A
1@
b101 ?
b11111010 >
r0.5 =
b1010 <
b101 ;
1:
19
18
17
b11 2
b11 1
1.
1-
1,
1+
b11 *
b11 )
b11 (
r1.5 '
r1 &
b101 #
#55
0"
#60
1"
b110 #
r1.2 &
r1.8 '
b0 (
b0 )
b0 *
0+
0,
0-
0.
b0 1
b0 2
07
08
09
0:
b110 ;
b1100 <
r0.6 =
b11111001 >
b110 ?
0@
0A
0B
0C
0D
0E
0F
0G