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2cad22a22a
** Add simulation context (VerilatedContext) to allow multiple fully independent
models to be in the same process. Please see the updated examples.
** Add context->time() and context->timeInc() API calls, to set simulation time.
These now are recommended in place of the legacy sc_time_stamp().
28 lines
777 B
Perl
Executable File
28 lines
777 B
Perl
Executable File
#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2020 by Wilson Snyder and Marlon James. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(vlt_all => 1);
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top_filename("t/t_wrapper_legacy.v");
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compile(
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make_top_shell => 0,
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make_main => 0,
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verilator_flags2 => ["--exe $Self->{t_dir}/t_wrapper_legacy.cpp"],
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make_flags => 'CPPFLAGS_ADD=-UVL_TIME_CONTEXT',
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);
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execute(
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check_finished => 1,
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);
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ok(1);
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1;
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