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54 lines
1.3 KiB
C++
54 lines
1.3 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2022 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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#include <verilated.h>
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#if VM_TRACE_FST
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#include <verilated_fst_c.h>
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#define TRACE_FILE_NAME "simx.fst"
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#define TRACE_CLASS VerilatedFstC
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#elif VM_TRACE_VCD
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#include <verilated_vcd_c.h>
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#define TRACE_FILE_NAME "simx.vcd"
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#define TRACE_CLASS VerilatedVcdC
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#endif
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#include <memory>
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#include VM_PREFIX_INCLUDE
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unsigned long long main_time = 0;
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double sc_time_stamp() { return (double)main_time; }
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int main(int argc, char** argv) {
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Verilated::debug(0);
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Verilated::traceEverOn(true);
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Verilated::commandArgs(argc, argv);
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// This test is to specifically check "" as the below upper model name
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std::unique_ptr<VM_PREFIX> top{new VM_PREFIX{""}};
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std::unique_ptr<TRACE_CLASS> tfp{new TRACE_CLASS};
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top->trace(tfp.get(), 99);
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tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/" TRACE_FILE_NAME);
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top->clk = 0;
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while (main_time <= 20) {
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top->eval();
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tfp->dump((unsigned int)(main_time));
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++main_time;
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top->clk = !top->clk;
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}
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tfp->close();
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top->final();
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tfp.reset();
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top.reset();
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printf("*-* All Finished *-*\n");
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return 0;
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}
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