verilator/test_regress/t/t_cellarray.py
2024-09-08 13:00:03 -04:00

22 lines
604 B
Python
Executable File

#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.compile(v_flags2=["--stats -fno-dfg"])
test.execute()
if test.vlt_all:
test.file_grep(test.stats, r'Optimizations, Gate assign merged\s+(\d+)', 28)
test.passes()