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45 lines
1.4 KiB
Python
Executable File
45 lines
1.4 KiB
Python
Executable File
#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2024 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.compile()
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if test.vlt_all:
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# The word 'this' (but only the whole word 'this' should have been replaced
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# in the contents.
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has_this = False
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has_xthis = False
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has_thisx = False
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has_xthisx = False
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for filename in test.glob_some(test.obj_dir + "/" + test.vm_prefix +
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"___024root__DepSet_*__0.cpp"):
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text = test.file_contents(filename)
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if re.search(r'\bthis->clk\b', text):
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has_this = True
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if re.search(r'\bxthis\b', text):
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has_xthis = True
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if re.search(r'\bthisx\b', text):
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has_thisx = True
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if re.search(r'\bxthisx\b', text):
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has_xthisx = True
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if has_this:
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test.error("Some file has 'this->clk'")
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if not has_xthis:
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test.error("No file has 'xthis'")
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if not has_thisx:
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test.error("No file has 'thisx'")
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if not has_xthisx:
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test.error("No file has 'xthisx'")
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test.passes()
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