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9abab2c366
Static variable initializers run before initial blocks, so use an explicitly different procedure type for them. This also enables us to now raise errors for assignments to const variables in initial blocks.
621 lines
26 KiB
C++
621 lines
26 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//*************************************************************************
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// DESCRIPTION: Verilator: Break always into sensitivity active domains
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//
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// Code available from: https://verilator.org
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//
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//*************************************************************************
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//
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// Copyright 2003-2022 by Wilson Snyder. This program is free software; you
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// can redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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//
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//*************************************************************************
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// V3Active's Transformations:
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//
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// Note this can be called multiple times.
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// Create a IACTIVE(initial), SACTIVE(combo)
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// ALWAYS: Remove any-edges from sense list
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// If no POS/NEG in senselist, Fold into SACTIVE(combo)
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// Else fold into SACTIVE(sequent).
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// OPTIMIZE: When support async clocks, fold into that active if possible
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// INITIAL: Move into IACTIVE
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// WIRE: Move into SACTIVE(combo)
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//
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//*************************************************************************
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#include "config_build.h"
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#include "verilatedos.h"
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#include "V3Global.h"
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#include "V3Active.h"
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#include "V3Ast.h"
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#include "V3Const.h"
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#include "V3Graph.h"
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#include <unordered_map>
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//***** See below for main transformation engine
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//######################################################################
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// Extend V3GraphVertex class for use in latch detection graph
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class LatchDetectGraphVertex final : public V3GraphVertex {
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public:
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enum VertexType : uint8_t { VT_BLOCK, VT_BRANCH, VT_OUTPUT };
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private:
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const string m_name; // Only used for .dot file generation
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const VertexType m_type; // Vertex type (BLOCK/BRANCH/OUTPUT)
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string typestr() const { // "
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switch (m_type) {
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case VT_BLOCK: return "(||)"; // basic block node
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case VT_BRANCH: return "(&&)"; // if/else branch mode
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case VT_OUTPUT: return "(out)"; // var assignment
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default: return "??"; // unknown
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}
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}
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public:
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LatchDetectGraphVertex(V3Graph* graphp, const string& name, VertexType type = VT_BLOCK)
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: V3GraphVertex{graphp}
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, m_name{name}
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, m_type{type} {}
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virtual string name() const override { return m_name + " " + typestr(); }
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virtual string dotColor() const override { return user() ? "green" : "black"; }
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virtual int type() const { return m_type; }
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};
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//######################################################################
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// Extend V3Graph class for use as a latch detection graph
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class LatchDetectGraph final : public V3Graph {
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protected:
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LatchDetectGraphVertex* m_curVertexp; // Current latch detection graph vertex
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std::vector<AstVarRef*> m_outputs; // Vector of lvalues encountered on this pass
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VL_DEBUG_FUNC; // Declare debug()
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static LatchDetectGraphVertex* castVertexp(void* vertexp) {
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return reinterpret_cast<LatchDetectGraphVertex*>(vertexp);
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}
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// Recursively traverse the graph to determine whether every control 'BLOCK' has an assignment
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// to the output we are currently analysing (the output whose 'user() is set), if so return
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// true. Where a BLOCK contains a BRANCH, both the if and else sides of the branch must return
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// true for the BRANCH to evalute to true. A BLOCK however needs only a single one of its
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// siblings to evaluate true in order to evaluate true itself. On output vertex only evaluates
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// true if it is the vertex we are analyzing on this check
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bool latchCheckInternal(LatchDetectGraphVertex* vertexp) {
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bool result = false;
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switch (vertexp->type()) {
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case LatchDetectGraphVertex::VT_OUTPUT: // Base case
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result = vertexp->user();
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break;
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case LatchDetectGraphVertex::VT_BLOCK: // (OR of potentially many siblings)
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for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep = edgep->outNextp()) {
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if (latchCheckInternal(castVertexp(edgep->top()))) {
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result = true;
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break;
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}
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}
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break;
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case LatchDetectGraphVertex::VT_BRANCH: // (AND of both sibling)
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// A BRANCH vertex always has exactly 2 siblings
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LatchDetectGraphVertex* const ifp = castVertexp(vertexp->outBeginp()->top());
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LatchDetectGraphVertex* const elsp
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= castVertexp(vertexp->outBeginp()->outNextp()->top());
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result = latchCheckInternal(ifp) && latchCheckInternal(elsp);
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break;
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}
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vertexp->user(result);
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return result;
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}
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public:
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LatchDetectGraph() { clear(); }
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virtual ~LatchDetectGraph() override { clear(); }
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// ACCESSORS
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LatchDetectGraphVertex* currentp() { return m_curVertexp; }
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void currentp(LatchDetectGraphVertex* vertex) { m_curVertexp = vertex; }
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// METHODS
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void begin() {
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// Start a new if/else tracking graph
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// See NODE STATE comment in ActiveLatchCheckVisitor
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AstNode::user1ClearTree();
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m_curVertexp = new LatchDetectGraphVertex(this, "ROOT");
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}
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// Clear out userp field of referenced outputs on destruction
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// (occurs at the end of each combinational always block)
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void clear() {
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m_outputs.clear();
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// Calling base class clear will unlink & delete all edges & vertices
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V3Graph::clear();
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m_curVertexp = nullptr;
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}
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// Add a new control path and connect it to its parent
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LatchDetectGraphVertex* addPathVertex(LatchDetectGraphVertex* parent, const string& name,
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bool branch = false) {
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m_curVertexp = new LatchDetectGraphVertex{this, name,
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branch ? LatchDetectGraphVertex::VT_BRANCH
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: LatchDetectGraphVertex::VT_BLOCK};
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new V3GraphEdge{this, parent, m_curVertexp, 1};
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return m_curVertexp;
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}
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// Add a new output variable vertex and store a pointer to it in the user1 field of the
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// variables AstNode
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LatchDetectGraphVertex* addOutputVertex(AstVarRef* nodep) {
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LatchDetectGraphVertex* const outVertexp
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= new LatchDetectGraphVertex{this, nodep->name(), LatchDetectGraphVertex::VT_OUTPUT};
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nodep->varp()->user1p(outVertexp);
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m_outputs.push_back(nodep);
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return outVertexp;
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}
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// Connect an output assignment to its parent control block
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void addAssignment(AstVarRef* nodep) {
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LatchDetectGraphVertex* outVertexp;
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if (!nodep->varp()->user1p()) { // Not seen this output before
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outVertexp = addOutputVertex(nodep);
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} else {
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outVertexp = castVertexp(nodep->varp()->user1p());
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}
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new V3GraphEdge(this, m_curVertexp, outVertexp, 1);
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}
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// Run latchCheckInternal on each variable assigned by the always block to see if all control
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// paths make an assignment. Detected latches are flagged in the variables AstVar
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void latchCheck(AstNode* nodep, bool latch_expected) {
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bool latch_detected = false;
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for (const auto& vrp : m_outputs) {
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LatchDetectGraphVertex* const vertp = castVertexp(vrp->varp()->user1p());
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vertp->user(true); // Identify the output vertex we are checking paths _to_
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if (!latchCheckInternal(castVertexp(verticesBeginp()))) latch_detected = true;
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if (latch_detected && !latch_expected) {
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nodep->v3warn(
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LATCH,
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"Latch inferred for signal "
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<< vrp->prettyNameQ()
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<< " (not all control paths of combinational always assign a value)\n"
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<< nodep->warnMore()
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<< "... Suggest use of always_latch for intentional latches");
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if (debug() >= 9) dumpDotFilePrefixed("latch_" + vrp->name());
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}
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vertp->user(false); // Clear again (see above)
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vrp->varp()->isLatched(latch_detected);
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}
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// Should _all_ variables assigned in always_latch be latches? Probably, but this only
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// warns if none of them are
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if (latch_expected && !latch_detected)
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nodep->v3warn(NOLATCH, "No latches detected in always_latch block");
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}
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};
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//######################################################################
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// Collect existing active names
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class ActiveBaseVisitor VL_NOT_FINAL : public VNVisitor {
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protected:
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VL_DEBUG_FUNC; // Declare debug()
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};
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class ActiveNamer final : public ActiveBaseVisitor {
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private:
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// STATE
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AstScope* m_scopep = nullptr; // Current scope to add statement to
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AstActive* m_iActivep = nullptr; // For current scope, the IActive we're building
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AstActive* m_cActivep = nullptr; // For current scope, the SActive(combo) we're building
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// Map from AstSenTree (equivalence) to the corresponding AstActive created.
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std::unordered_map<VNRef<AstSenTree>, AstActive*> m_activeMap;
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// METHODS
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void addActive(AstActive* nodep) {
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UASSERT_OBJ(m_scopep, nodep, "nullptr scope");
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m_scopep->addActivep(nodep);
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}
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// VISITORS
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virtual void visit(AstScope* nodep) override {
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m_scopep = nodep;
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m_iActivep = nullptr;
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m_cActivep = nullptr;
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m_activeMap.clear();
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iterateChildren(nodep);
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// Don't clear scopep, the namer persists beyond this visit
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}
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virtual void visit(AstSenTree* nodep) override {
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// Simplify sensitivity list
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VL_DO_DANGLING(V3Const::constifyExpensiveEdit(nodep), nodep);
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}
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//--------------------
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virtual void visit(AstNodeStmt*) override {} // Accelerate
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virtual void visit(AstNode* nodep) override { iterateChildren(nodep); }
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public:
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// METHODS
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AstScope* scopep() { return m_scopep; }
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AstActive* getCActive(FileLine* fl) {
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if (!m_cActivep) {
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m_cActivep = new AstActive(
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fl, "combo", new AstSenTree(fl, new AstSenItem(fl, AstSenItem::Combo())));
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m_cActivep->sensesStorep(m_cActivep->sensesp());
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addActive(m_cActivep);
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}
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return m_cActivep;
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}
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AstActive* getIActive(FileLine* fl) {
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if (!m_iActivep) {
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m_iActivep = new AstActive(
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fl, "initial", new AstSenTree(fl, new AstSenItem(fl, AstSenItem::Initial())));
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m_iActivep->sensesStorep(m_iActivep->sensesp());
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addActive(m_iActivep);
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}
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return m_iActivep;
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}
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// Return an AstActive that is sensitive to a SenTree equivalent to the given sentreep.
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AstActive* getActive(FileLine* fl, AstSenTree* sensesp) {
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auto it = m_activeMap.find(*sensesp);
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// If found matching AstActive, return it
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if (it != m_activeMap.end()) return it->second;
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// No such AstActive yet, creat it, and add to map.
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AstSenTree* const newsenp = sensesp->cloneTree(false);
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AstActive* const activep = new AstActive(fl, "sequent", newsenp);
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activep->sensesStorep(activep->sensesp());
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addActive(activep);
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m_activeMap.emplace(*newsenp, activep);
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return activep;
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}
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// CONSTRUCTORS
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ActiveNamer() = default;
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virtual ~ActiveNamer() override = default;
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void main(AstScope* nodep) { iterate(nodep); }
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};
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//######################################################################
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// Latch checking visitor
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class ActiveLatchCheckVisitor final : public ActiveBaseVisitor {
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private:
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// NODE STATE
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// Input:
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// AstVar::user1p // V2LatchGraphVertex* The vertex handling this node
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const VNUser1InUse m_inuser1;
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// STATE
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LatchDetectGraph m_graph; // Graph used to detect latches in combo always
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// VISITORS
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virtual void visit(AstVarRef* nodep) {
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const AstVar* const varp = nodep->varp();
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if (nodep->access().isWriteOrRW() && varp->isSignal() && !varp->isUsedLoopIdx()) {
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m_graph.addAssignment(nodep);
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}
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}
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virtual void visit(AstNodeIf* nodep) {
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if (!nodep->isBoundsCheck()) {
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LatchDetectGraphVertex* const parentp = m_graph.currentp();
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LatchDetectGraphVertex* const branchp = m_graph.addPathVertex(parentp, "BRANCH", true);
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m_graph.addPathVertex(branchp, "IF");
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iterateAndNextNull(nodep->ifsp());
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m_graph.addPathVertex(branchp, "ELSE");
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iterateAndNextNull(nodep->elsesp());
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m_graph.currentp(parentp);
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}
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}
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//--------------------
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virtual void visit(AstNode* nodep) { iterateChildren(nodep); }
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public:
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// CONSTRUCTORS
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ActiveLatchCheckVisitor(AstNode* nodep, VAlwaysKwd kwd) {
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m_graph.begin();
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iterate(nodep);
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m_graph.latchCheck(nodep, kwd == VAlwaysKwd::ALWAYS_LATCH);
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}
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virtual ~ActiveLatchCheckVisitor() {}
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};
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//######################################################################
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// Active AssignDly replacement functions
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class ActiveDlyVisitor final : public ActiveBaseVisitor {
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public:
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enum CheckType : uint8_t { CT_SEQ, CT_COMBO, CT_INITIAL, CT_LATCH };
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private:
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const CheckType m_check; // Combo logic or other
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const AstNode* const m_alwaysp; // Always we're under
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const AstNode* m_assignp = nullptr; // In assign
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// VISITORS
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virtual void visit(AstAssignDly* nodep) override {
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if (m_check != CT_SEQ) {
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// Convert to a non-delayed assignment
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UINFO(5, " ASSIGNDLY " << nodep << endl);
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if (m_check == CT_INITIAL) {
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nodep->v3warn(INITIALDLY, "Delayed assignments (<=) in initial or final block\n"
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<< nodep->warnMore()
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<< "... Suggest blocking assignments (=)");
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} else if (m_check == CT_LATCH) {
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// Suppress. Shouldn't matter that the interior of the latch races
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} else if (!(VN_IS(nodep->lhsp(), VarRef)
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&& VN_AS(nodep->lhsp(), VarRef)->varp()->isLatched())) {
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nodep->v3warn(COMBDLY, "Delayed assignments (<=) in non-clocked"
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" (non flop or latch) block\n"
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<< nodep->warnMore()
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<< "... Suggest blocking assignments (=)");
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// Conversely, we could also suggest latches use delayed assignments, as
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// recommended by Cliff Cummings?
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}
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AstNode* const newp = new AstAssign(nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
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nodep->rhsp()->unlinkFrBack());
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nodep->replaceWith(newp);
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VL_DO_DANGLING(nodep->deleteTree(), nodep);
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}
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}
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virtual void visit(AstAssign* nodep) override {
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if (m_check == CT_SEQ) {
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VL_RESTORER(m_assignp);
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m_assignp = nodep;
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iterateAndNextNull(nodep->lhsp());
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}
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}
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virtual void visit(AstVarRef* nodep) override {
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const AstVar* const varp = nodep->varp();
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if (m_check == CT_SEQ && m_assignp && !varp->isUsedLoopIdx() // Ignore loop indices
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&& !varp->isTemp()) {
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// Allow turning off warnings on the always, or the variable also
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if (!m_alwaysp->fileline()->warnIsOff(V3ErrorCode::BLKSEQ)
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&& !m_assignp->fileline()->warnIsOff(V3ErrorCode::BLKSEQ)
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&& !varp->fileline()->warnIsOff(V3ErrorCode::BLKSEQ)) {
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m_assignp->v3warn(BLKSEQ,
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"Blocking assignments (=) in sequential (flop or latch) block\n"
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<< m_assignp->warnMore()
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<< "... Suggest delayed assignments (<=)");
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m_alwaysp->fileline()->modifyWarnOff(
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V3ErrorCode::BLKSEQ, true); // Complain just once for the entire always
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varp->fileline()->modifyWarnOff(V3ErrorCode::BLKSEQ, true);
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}
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}
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}
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//--------------------
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virtual void visit(AstNode* nodep) override { iterateChildren(nodep); }
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public:
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// CONSTRUCTORS
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ActiveDlyVisitor(AstNode* nodep, CheckType check)
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: m_check{check}
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, m_alwaysp{nodep} {
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iterate(nodep);
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}
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virtual ~ActiveDlyVisitor() override = default;
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};
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//######################################################################
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// Active class functions
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class ActiveVisitor final : public ActiveBaseVisitor {
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private:
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// NODE STATE
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// Each call to V3Const::constify
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// AstNode::user4() Used by V3Const::constify, called below
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// STATE
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ActiveNamer m_namer; // Tracking of active names
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AstCFunc* m_scopeFinalp = nullptr; // Final function for this scope
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bool m_itemCombo = false; // Found a SenItem combo
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bool m_itemSequent = false; // Found a SenItem sequential
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// VISITORS
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virtual void visit(AstScope* nodep) override {
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// Create required actives and add to scope
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UINFO(4, " SCOPE " << nodep << endl);
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// Clear last scope's names, and collect this scope's existing names
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m_namer.main(nodep);
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m_scopeFinalp = nullptr;
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iterateChildren(nodep);
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}
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virtual void visit(AstActive* nodep) override {
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// Actives are being formed, so we can ignore any already made
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}
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virtual void visit(AstInitialStatic* nodep) override {
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// Relink to IACTIVE, unless already under it
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UINFO(4, " INITIAL " << nodep << endl);
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const ActiveDlyVisitor dlyvisitor{nodep, ActiveDlyVisitor::CT_INITIAL};
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AstActive* const wantactivep = m_namer.getIActive(nodep->fileline());
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nodep->unlinkFrBack();
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wantactivep->addStmtsp(nodep);
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}
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virtual void visit(AstInitial* nodep) override {
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// Relink to IACTIVE, unless already under it
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UINFO(4, " INITIAL " << nodep << endl);
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const ActiveDlyVisitor dlyvisitor{nodep, ActiveDlyVisitor::CT_INITIAL};
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AstActive* const wantactivep = m_namer.getIActive(nodep->fileline());
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nodep->unlinkFrBack();
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wantactivep->addStmtsp(nodep);
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}
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virtual void visit(AstAssignAlias* nodep) override {
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// Relink to CACTIVE, unless already under it
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UINFO(4, " ASSIGNW " << nodep << endl);
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AstActive* const wantactivep = m_namer.getCActive(nodep->fileline());
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nodep->unlinkFrBack();
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wantactivep->addStmtsp(nodep);
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}
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virtual void visit(AstAssignW* nodep) override {
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// Relink to CACTIVE, unless already under it
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UINFO(4, " ASSIGNW " << nodep << endl);
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AstActive* const wantactivep = m_namer.getCActive(nodep->fileline());
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nodep->unlinkFrBack();
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wantactivep->addStmtsp(nodep);
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}
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virtual void visit(AstCoverToggle* nodep) override {
|
|
// Relink to CACTIVE, unless already under it
|
|
UINFO(4, " COVERTOGGLE " << nodep << endl);
|
|
AstActive* const wantactivep = m_namer.getCActive(nodep->fileline());
|
|
nodep->unlinkFrBack();
|
|
wantactivep->addStmtsp(nodep);
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|
}
|
|
virtual void visit(AstFinal* nodep) override {
|
|
// Relink to CFUNC for the final
|
|
UINFO(4, " FINAL " << nodep << endl);
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|
if (!nodep->bodysp()) { // Empty, Kill it.
|
|
VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
|
|
return;
|
|
}
|
|
const ActiveDlyVisitor dlyvisitor{nodep, ActiveDlyVisitor::CT_INITIAL};
|
|
if (!m_scopeFinalp) {
|
|
m_scopeFinalp = new AstCFunc(
|
|
nodep->fileline(), "_final_" + m_namer.scopep()->nameDotless(), m_namer.scopep());
|
|
m_scopeFinalp->dontCombine(true);
|
|
m_scopeFinalp->isFinal(true);
|
|
m_scopeFinalp->isStatic(false);
|
|
m_scopeFinalp->isLoose(true);
|
|
m_scopeFinalp->slow(true);
|
|
m_namer.scopep()->addActivep(m_scopeFinalp);
|
|
}
|
|
nodep->unlinkFrBack();
|
|
m_scopeFinalp->addStmtsp(nodep->bodysp()->unlinkFrBackWithNext());
|
|
VL_DO_DANGLING(nodep->deleteTree(), nodep);
|
|
}
|
|
|
|
// METHODS
|
|
void visitAlways(AstNode* nodep, AstSenTree* oldsensesp, VAlwaysKwd kwd) {
|
|
// Move always to appropriate ACTIVE based on its sense list
|
|
if (oldsensesp && oldsensesp->sensesp() && oldsensesp->sensesp()->isNever()) {
|
|
// Never executing. Kill it.
|
|
UASSERT_OBJ(!oldsensesp->sensesp()->nextp(), nodep,
|
|
"Never senitem should be alone, else the never should be eliminated.");
|
|
VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
|
|
return;
|
|
}
|
|
|
|
// Read sensitivities
|
|
m_itemCombo = false;
|
|
m_itemSequent = false;
|
|
iterateAndNextNull(oldsensesp);
|
|
bool combo = m_itemCombo;
|
|
bool sequent = m_itemSequent;
|
|
|
|
if (!combo && !sequent) combo = true; // If no list, Verilog 2000: always @ (*)
|
|
if (combo && sequent) {
|
|
nodep->v3warn(E_UNSUPPORTED, "Unsupported: Mixed edge (pos/negedge) and activity "
|
|
"(no edge) sensitive activity list");
|
|
sequent = false;
|
|
}
|
|
|
|
AstActive* wantactivep = nullptr;
|
|
if (combo && !sequent) {
|
|
// Combo: Relink to ACTIVE(combo)
|
|
wantactivep = m_namer.getCActive(nodep->fileline());
|
|
} else {
|
|
// Sequential: Build a ACTIVE(name)
|
|
// OPTIMIZE: We could substitute a constant for things in the sense list, for example
|
|
// always (posedge RESET) { if (RESET).... } we know RESET is true.
|
|
// Summarize a long list of combo inputs as just "combo"
|
|
#ifndef __COVERITY__ // Else dead code on next line.
|
|
if (combo) {
|
|
oldsensesp->addSensesp(new AstSenItem(nodep->fileline(), AstSenItem::Combo()));
|
|
}
|
|
#endif
|
|
wantactivep = m_namer.getActive(nodep->fileline(), oldsensesp);
|
|
}
|
|
|
|
// Delete sensitivity list
|
|
if (oldsensesp) {
|
|
VL_DO_DANGLING(oldsensesp->unlinkFrBackWithNext()->deleteTree(), oldsensesp);
|
|
}
|
|
|
|
// Move node to new active
|
|
nodep->unlinkFrBack();
|
|
wantactivep->addStmtsp(nodep);
|
|
|
|
// Warn and/or convert any delayed assignments
|
|
if (combo && !sequent) {
|
|
const ActiveLatchCheckVisitor latchvisitor{nodep, kwd};
|
|
if (kwd == VAlwaysKwd::ALWAYS_LATCH) {
|
|
ActiveDlyVisitor{nodep, ActiveDlyVisitor::CT_LATCH};
|
|
} else {
|
|
ActiveDlyVisitor{nodep, ActiveDlyVisitor::CT_COMBO};
|
|
}
|
|
} else if (!combo && sequent) {
|
|
ActiveDlyVisitor{nodep, ActiveDlyVisitor::CT_SEQ};
|
|
}
|
|
}
|
|
virtual void visit(AstAlways* nodep) override {
|
|
// Move always to appropriate ACTIVE based on its sense list
|
|
UINFO(4, " ALW " << nodep << endl);
|
|
// if (debug() >= 9) nodep->dumpTree(cout, " Alw: ");
|
|
|
|
if (!nodep->bodysp()) {
|
|
// Empty always. Kill it.
|
|
VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
|
|
return;
|
|
}
|
|
visitAlways(nodep, nodep->sensesp(), nodep->keyword());
|
|
}
|
|
virtual void visit(AstAlwaysPostponed* nodep) override {
|
|
UINFO(4, " ALW " << nodep << endl);
|
|
if (!nodep->bodysp()) {
|
|
VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
|
|
return;
|
|
}
|
|
visitAlways(nodep, nullptr, VAlwaysKwd::ALWAYS);
|
|
}
|
|
virtual void visit(AstAlwaysPublic* nodep) override {
|
|
// Move always to appropriate ACTIVE based on its sense list
|
|
UINFO(4, " ALWPub " << nodep << endl);
|
|
// if (debug() >= 9) nodep->dumpTree(cout, " Alw: ");
|
|
visitAlways(nodep, nodep->sensesp(), VAlwaysKwd::ALWAYS);
|
|
}
|
|
virtual void visit(AstSenItem* nodep) override {
|
|
if (nodep->varrefp()) {
|
|
if (const AstBasicDType* const basicp = nodep->varrefp()->dtypep()->basicp()) {
|
|
if (basicp->isEventValue()) {
|
|
// Events need to be treated as active high so we only activate on event being
|
|
// 1
|
|
UINFO(8, "Demote event to HIGHEDGE " << nodep << endl);
|
|
nodep->edgeType(VEdgeType::ET_HIGHEDGE);
|
|
}
|
|
}
|
|
}
|
|
if (nodep->edgeType() == VEdgeType::ET_ANYEDGE) {
|
|
m_itemCombo = true;
|
|
// Delete the sensitivity
|
|
// We'll add it as a generic COMBO SenItem in a moment.
|
|
VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
|
|
} else if (nodep->varrefp()) {
|
|
// V3LinkResolve should have cleaned most of these up
|
|
if (!nodep->varrefp()->width1()) {
|
|
nodep->v3warn(E_UNSUPPORTED,
|
|
"Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
|
|
<< nodep->varrefp()->prettyNameQ());
|
|
}
|
|
m_itemSequent = true;
|
|
nodep->varrefp()->varp()->usedClock(true);
|
|
}
|
|
}
|
|
|
|
//--------------------
|
|
virtual void visit(AstNodeMath*) override {} // Accelerate
|
|
virtual void visit(AstVarScope*) override {} // Accelerate
|
|
virtual void visit(AstNode* nodep) override { iterateChildren(nodep); }
|
|
|
|
public:
|
|
// CONSTRUCTORS
|
|
explicit ActiveVisitor(AstNetlist* nodep) { iterate(nodep); }
|
|
virtual ~ActiveVisitor() override = default;
|
|
};
|
|
|
|
//######################################################################
|
|
// Active class functions
|
|
|
|
void V3Active::activeAll(AstNetlist* nodep) {
|
|
UINFO(2, __FUNCTION__ << ": " << endl);
|
|
{ ActiveVisitor{nodep}; } // Destruct before checking
|
|
V3Global::dumpCheckGlobalTree("active", 0, v3Global.opt.dumpTreeLevel(__FILE__) >= 3);
|
|
}
|