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171 lines
5.4 KiB
Verilog
171 lines
5.4 KiB
Verilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2003 by Wilson Snyder.
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module t;
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// verilator lint_off LITENDIAN
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reg [5:0] binary_string [2:15];
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reg [5:0] binary_nostart [2:15];
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reg [5:0] binary_start [0:15];
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reg [175:0] hex [0:15];
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reg [(32*6)-1:0] hex_align [0:15];
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string fns;
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`ifdef WRITEMEM_READ_BACK
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reg [5:0] binary_string_tmp [2:15];
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reg [5:0] binary_nostart_tmp [2:15];
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reg [5:0] binary_start_tmp [0:15];
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reg [175:0] hex_tmp [0:15];
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reg [(32*6)-1:0] hex_align_tmp [0:15];
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string fns_tmp;
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`endif
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// verilator lint_on LITENDIAN
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integer i;
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initial begin
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begin
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// Initialize memories to zero,
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// avoid differences between 2-state and 4-state.
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for (i=0; i<16; i=i+1) begin
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binary_start[i] = 6'h0;
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hex[i] = 176'h0;
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hex_align[i] = {32*6{1'b0}};
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`ifdef WRITEMEM_READ_BACK
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binary_start_tmp[i] = 6'h0;
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hex_tmp[i] = 176'h0;
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hex_align_tmp[i] = {32*6{1'b0}};
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`endif
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end
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for (i=2; i<16; i=i+1) begin
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binary_string[i] = 6'h0;
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binary_nostart[i] = 6'h0;
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`ifdef WRITEMEM_READ_BACK
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binary_string_tmp[i] = 6'h0;
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binary_nostart_tmp[i] = 6'h0;
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`endif
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end
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end
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begin
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`ifdef WRITEMEM_READ_BACK
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$readmemb("t/t_sys_readmem_b.mem", binary_nostart_tmp);
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// Do a round-trip $writememh and $readmemh cycle.
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// This covers $writememh and ensures we can read our
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// own memh output file.
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`ifdef TEST_VERBOSE
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$display("-Writing %s", `OUT_TMP1);
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`endif
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$writememh(`OUT_TMP1, binary_nostart_tmp);
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$readmemh(`OUT_TMP1, binary_nostart);
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`else
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$readmemb("t/t_sys_readmem_b.mem", binary_nostart);
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`endif
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`ifdef TEST_VERBOSE
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for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_nostart[i]);
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`endif
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if (binary_nostart['h2] != 6'h02) $stop;
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if (binary_nostart['h3] != 6'h03) $stop;
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if (binary_nostart['h4] != 6'h04) $stop;
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if (binary_nostart['h5] != 6'h05) $stop;
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if (binary_nostart['h6] != 6'h06) $stop;
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if (binary_nostart['h7] != 6'h07) $stop;
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if (binary_nostart['h8] != 6'h10) $stop;
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if (binary_nostart['hc] != 6'h14) $stop;
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if (binary_nostart['hd] != 6'h15) $stop;
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end
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begin
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`ifdef WRITEMEM_READ_BACK
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$readmemb("t/t_sys_readmem_b_8.mem", binary_start_tmp, 4, 4+7);
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`ifdef TEST_VERBOSE
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$display("-Writing %s", `OUT_TMP2);
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`endif
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$writememh(`OUT_TMP2, binary_start_tmp, 4, 4+7);
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$readmemh(`OUT_TMP2, binary_start, 4, 4+7);
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`else
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$readmemb("t/t_sys_readmem_b_8.mem", binary_start, 4, 4+7);
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`endif
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`ifdef TEST_VERBOSE
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for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_start[i]);
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`endif
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if (binary_start['h04] != 6'h10) $stop;
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if (binary_start['h05] != 6'h11) $stop;
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if (binary_start['h06] != 6'h12) $stop;
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if (binary_start['h07] != 6'h13) $stop;
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if (binary_start['h08] != 6'h14) $stop;
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if (binary_start['h09] != 6'h15) $stop;
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if (binary_start['h0a] != 6'h16) $stop;
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if (binary_start['h0b] != 6'h17) $stop;
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end
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begin
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// The 'hex' array is a non-exact multiple of word size
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// (possible corner case)
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`ifdef WRITEMEM_READ_BACK
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$readmemh("t/t_sys_readmem_h.mem", hex_tmp, 0);
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`ifdef TEST_VERBOSE
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$display("-Writing %s", `OUT_TMP3);
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`endif
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$writememh(`OUT_TMP3, hex_tmp, 0);
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$readmemh(`OUT_TMP3, hex, 0);
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`else
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$readmemh("t/t_sys_readmem_h.mem", hex, 0);
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`endif
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`ifdef TEST_VERBOSE
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for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, hex[i]);
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`endif
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if (hex['h04] != 176'h400437654321276543211765432107654321abcdef10) $stop;
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if (hex['h0a] != 176'h400a37654321276543211765432107654321abcdef11) $stop;
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if (hex['h0b] != 176'h400b37654321276543211765432107654321abcdef12) $stop;
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if (hex['h0c] != 176'h400c37654321276543211765432107654321abcdef13) $stop;
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end
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begin
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// The 'hex align' array is similar to 'hex', but it is an
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// exact multiple of word size -- another possible corner case.
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`ifdef WRITEMEM_READ_BACK
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$readmemh("t/t_sys_readmem_align_h.mem", hex_align_tmp, 0);
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`ifdef TEST_VERBOSE
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$display("-Writing %s", `OUT_TMP4);
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`endif
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$writememh(`OUT_TMP4, hex_align_tmp, 0);
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$readmemh(`OUT_TMP4, hex_align, 0);
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`else
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$readmemh("t/t_sys_readmem_align_h.mem", hex_align, 0);
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`endif
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`ifdef TEST_VERBOSE
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for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, hex_align[i]);
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`endif
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if (hex_align['h04] != 192'h77554004_37654321_27654321_17654321_07654321_abcdef10) $stop;
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if (hex_align['h0a] != 192'h7755400a_37654321_27654321_17654321_07654321_abcdef11) $stop;
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if (hex_align['h0b] != 192'h7755400b_37654321_27654321_17654321_07654321_abcdef12) $stop;
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if (hex_align['h0c] != 192'h7755400c_37654321_27654321_17654321_07654321_abcdef13) $stop;
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end
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begin
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fns = "t/t_sys_readmem_b.mem";
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`ifdef WRITEMEM_READ_BACK
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fns_tmp = `OUT_TMP5;
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$readmemb(fns, binary_string_tmp);
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`ifdef TEST_VERBOSE
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$display("-Writing %s", `OUT_TMP5);
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`endif
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$writememh(fns_tmp, binary_string_tmp);
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$readmemh(fns_tmp, binary_string);
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`else
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$readmemb(fns, binary_string);
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`endif
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`ifdef TEST_VERBOSE
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for (i=0; i<16; i=i+1) $write(" @%x = %x\n", i, binary_string[i]);
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`endif
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if (binary_string['h2] != 6'h02) $stop;
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end
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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