verilator/test_regress/t/t_lint_literal_bad.v
2020-03-21 11:24:24 -04:00

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261 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2017 by Todd Strader.
// SPDX-License-Identifier: CC0-1.0
module t (
);
localparam the_localparam = 8'd256;
endmodule