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137 lines
1.7 KiB
Plaintext
137 lines
1.7 KiB
Plaintext
$version Generated by VerilatedVcd $end
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$timescale 1ps $end
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$scope module top $end
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$var wire 1 ( clk $end
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$scope module t $end
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$var wire 1 ( clk $end
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$var wire 32 # cyc [31:0] $end
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$scope module c5_data $end
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$var wire 1 $ valid $end
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$var wire 4 % value [3:0] $end
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$var wire 1 ) reset $end
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$upscope $end
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$scope module c6_data $end
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$var wire 1 & valid $end
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$var wire 4 ' value [3:0] $end
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$var wire 1 * reset $end
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$upscope $end
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$scope module cif2 $end
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$upscope $end
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$scope module cif3 $end
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$upscope $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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b00000000000000000000000000000001 #
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0$
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b0000 %
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0&
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b0000 '
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0(
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0)
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0*
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#10
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b00000000000000000000000000000010 #
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1(
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#15
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0(
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#20
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b00000000000000000000000000000011 #
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b1111 %
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1&
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b1010 '
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1(
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#25
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0(
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#30
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b00000000000000000000000000000100 #
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1(
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#35
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0(
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#40
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b00000000000000000000000000000101 #
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1(
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#45
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0(
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#50
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b00000000000000000000000000000110 #
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1(
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#55
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0(
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#60
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b00000000000000000000000000000111 #
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1(
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#65
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0(
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#70
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b00000000000000000000000000001000 #
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1(
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#75
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0(
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#80
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b00000000000000000000000000001001 #
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1(
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#85
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0(
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#90
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b00000000000000000000000000001010 #
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1(
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#95
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0(
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#100
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b00000000000000000000000000001011 #
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1(
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#105
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0(
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#110
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b00000000000000000000000000001100 #
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1(
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#115
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0(
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#120
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b00000000000000000000000000001101 #
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1(
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#125
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0(
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#130
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b00000000000000000000000000001110 #
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1(
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#135
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0(
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#140
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b00000000000000000000000000001111 #
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1(
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#145
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0(
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#150
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b00000000000000000000000000010000 #
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1(
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#155
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0(
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#160
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b00000000000000000000000000010001 #
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1(
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#165
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0(
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#170
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b00000000000000000000000000010010 #
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1(
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#175
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0(
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#180
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b00000000000000000000000000010011 #
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1(
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#185
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0(
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#190
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b00000000000000000000000000010100 #
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1(
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#195
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0(
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#200
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b00000000000000000000000000010101 #
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1(
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