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31 lines
877 B
Raku
Executable File
31 lines
877 B
Raku
Executable File
#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2022 by Antmicro Ltd. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(simulator => 1);
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# Should convert the first always into combo and detect cycle
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compile(
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fails => 1,
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verilator_flags2 => ["--timing"],
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expect =>
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'%Warning-UNOPTFLAT: t/t_timing_fork_comb.v:\d+:\d+: Signal unoptimizable: Circular combinational logic:'
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);
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compile(
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verilator_flags2 => ["--exe --main --timing -Wno-UNOPTFLAT"],
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);
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execute(
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check_finished => 1,
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);
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ok(1);
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1;
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