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51 lines
831 B
Systemverilog
51 lines
831 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Antmicro Ltd.
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// SPDX-License-Identifier: CC0-1.0
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typedef class Cls;
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class A;
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extern function void method();
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endclass
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class B;
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extern function void method();
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endclass
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class C;
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extern function void method();
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endclass
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class D;
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extern function void method();
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endclass
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function void A::method();
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B obj = new;
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obj.method();
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endfunction
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function void B::method();
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this.srandom(0);
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endfunction
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function void C::method();
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this.srandom(0);
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endfunction
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function void D::method();
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C obj = new;
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obj.method();
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endfunction
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module t;
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A obj1 = new;
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D obj2 = new;
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initial begin
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obj1.method();
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obj2.method();
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end
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endmodule
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