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https://github.com/verilator/verilator.git
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53 lines
1.1 KiB
C++
53 lines
1.1 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2010 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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#include <verilated.h>
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#include VM_PREFIX_INCLUDE
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//======================================================================
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unsigned int main_time = 0;
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double sc_time_stamp() { return main_time; }
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VM_PREFIX* topp = nullptr;
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bool fail = false;
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void check(QData got, QData exp) {
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if (got != exp) {
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VL_PRINTF("%%Error: got=0x%" PRIx64 " exp=0x%" PRIx64 "\n", got, exp);
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fail = true;
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}
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}
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int main(int argc, char* argv[]) {
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Verilated::debug(0);
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Verilated::commandArgs(argc, argv);
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topp = new VM_PREFIX;
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topp->a0 = 0;
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topp->eval();
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check(topp->y, 0x0ULL);
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topp->a0 = 15;
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topp->eval();
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check(topp->y, 0x3c00000000ULL);
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if (!fail) {
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VL_PRINTF("*-* All Finished *-*\n");
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topp->final();
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} else {
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vl_fatal(__FILE__, __LINE__, "top", "Unexpected results\n");
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}
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VL_DO_DANGLING(delete topp, topp);
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return 0;
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}
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