verilator/test_regress/t/t_lint_setout_bad.out
2023-09-23 08:52:50 -04:00

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%Error-PORTSHORT: t/t_lint_setout_bad.v:17:8: Output port is connected to a constant pin, electrical short
: ... note: In instance 't'
17 | .cpu_if_timeout(1'b0)
| ^~~~~~~~~~~~~~
... For error description see https://verilator.org/warn/PORTSHORT?v=latest
%Error: Exiting due to